McqMate
1. |
Any number with an exponent of zero is equal to: |
A. | zero |
B. | one |
C. | that number |
D. | ten |
Answer» B. one |
2. |
In the decimal numbering system, what is the MSD? |
A. | the middle digit of a stream of numbers |
B. | the digit to the right of the decimal point |
C. | the last digit on the right |
D. | the digit with the most weight |
Answer» D. the digit with the most weight |
3. |
Which of the following statements does NOT describe an advantage of digital technology? |
A. | the values may vary over a continuous range. |
B. | the circuits are less affected by noise. |
C. | the operation can be programmed. |
D. | information storage is easy. |
Answer» A. the values may vary over a continuous range. |
4. |
The generic array logic (GAL) device is ________. |
A. | one-time programmable |
B. | reprogrammable |
C. | a cmos device |
D. | reprogrammable and a cmos device |
Answer» B. reprogrammable |
5. |
The range of voltages between VL(max) and VH(min) are ________. |
A. | unknown |
B. | unnecessary |
C. | unacceptable |
D. | between 2 v and 5 v |
Answer» C. unacceptable |
6. |
What is a digital-to-analog converter? |
A. | it takes the digital information from an audio cd and converts it to a usable form. |
B. | it allows the use of cheaper analog techniques, which are always simpler. |
C. | it stores digital data on a hard drive. |
D. | it converts direct current to alternating current. |
Answer» A. it takes the digital information from an audio cd and converts it to a usable form. |
7. |
What are the symbols used to represent digits in the binary number system? |
A. | 0,1 |
B. | 0,1,2 |
C. | 0 through 8 |
D. | 1,2 |
Answer» A. 0,1 |
8. |
A full subtracter circuit requires ________. |
A. | two inputs and two outputs |
B. | two inputs and three outputs |
C. | three inputs and one output |
D. | three inputs and two outputs |
Answer» D. three inputs and two outputs |
9. |
The output of an AND gate is LOW ________. |
A. | all the time |
B. | when any input is low |
C. | when any input is high |
D. | when all inputs are high |
Answer» B. when any input is low |
10. |
Give the decimal value of binary 10010. |
A. | 610 |
B. | 910 |
C. | 1810 |
D. | 2010 |
Answer» C. 1810 |
11. |
Parallel format means that: |
A. | each digital signal has its own conductor. |
B. | several digital signals are sent on each conductor. |
C. | both binary and hexadecimal can be used. |
D. | no clock is needed. |
Answer» A. each digital signal has its own conductor. |
12. |
A decoder converts ________. |
A. | noncoded information into coded form |
B. | coded information into noncoded form |
C. | highs to lows |
D. | lows to highs |
Answer» B. coded information into noncoded form |
13. |
A DAC changes ________. |
A. | an analog signal into digital data |
B. | digital data into an analog signal |
C. | digital data into an amplified signal |
D. | none of the above |
Answer» B. digital data into an analog signal |
14. |
The output of a NOT gate is HIGH when ________. |
A. | the input is low |
B. | the input is high |
C. | the input changes from low to high |
D. | voltage is removed from the gate |
Answer» A. the input is low |
15. |
The output of an OR gate is LOW when ________. |
A. | all inputs are low |
B. | any input is low |
C. | any input is high |
D. | all inputs are high |
Answer» A. all inputs are low |
16. |
Which of the following is not an analog device? |
A. | thermocouple |
B. | current flow in a circuit |
C. | light switch |
D. | audio microphone |
Answer» C. light switch |
17. |
A demultiplexer has ________. |
A. | one data input and a number of selection inputs, and they have several outputs |
B. | one input and one output |
C. | several inputs and several outputs |
D. | several inputs and one output |
Answer» A. one data input and a number of selection inputs, and they have several outputs |
18. |
A flip-flop has ________. |
A. | one stable state |
B. | no stable states |
C. | two stable states |
D. | none of the above |
Answer» C. two stable states |
19. |
Digital signals transmitted on a single conductor (and a ground) must be transmitted in: |
A. | slow speed. |
B. | parallel. |
C. | analog. |
D. | serial. |
Answer» D. serial. |
20. |
In a certain digital waveform, the period is four times the pulse width. The duty cycle is ________. |
A. | 0% |
B. | 25% |
C. | 50% |
D. | 100% |
Answer» B. 25% |
21. |
Select the statement that best describes the parity method of error detection: |
A. | parity checking is best suited for detecting double-bit errors that occur during the transmission of codes from one location to another. |
B. | parity checking is not suitable for detecting single-bit errors in transmitted codes. |
C. | parity checking is best suited for detecting single-bit errors in transmitted codes. |
D. | parity checking is capable of detecting and correcting errors in transmitted codes. |
Answer» C. parity checking is best suited for detecting single-bit errors in transmitted codes. |
22. |
A logic circuit that provides a HIGH output for both inputs HIGH or both inputs LOW is a(n): |
A. | ex-nor gate |
B. | or gate |
C. | ex-or gate |
D. | nand gate |
Answer» A. ex-nor gate |
23. |
A logic circuit that provides a HIGH output if one input or the other input, but not both, is HIGH, is a(n): |
A. | ex-nor gate |
B. | or gate |
C. | ex-or gate |
D. | nand gate |
Answer» C. ex-or gate |
24. |
Identify the type of gate below from the equation |
A. | ex-nor gate |
B. | or gate |
C. | ex-or gate |
D. | nand gate |
Answer» C. ex-or gate |
25. |
Parity systems are defined as either________ or ________ and will add an extra ________ tothe digital information being transmitted. |
A. | positive, negative, byte |
B. | odd, even, bit |
C. | upper, lower, digit |
D. | on, off, decimal |
Answer» B. odd, even, bit |
26. |
Which type of gate can be used to add two bits? |
A. | ex-or |
B. | ex-nor |
C. | ex-nand |
D. | nor |
Answer» A. ex-or |
27. |
Show from the truth table how an exclusive-OR gate can be used to invert the data on one input if the other input is a special control function. |
A. | using a as the control, when a = 0, x is the same as b. when a = 1, x is the same as b. |
B. | using a as the control, when a = 0, x is the same as b. when a = 1, x is the inverse of b. |
C. | using a as the control, when a = 0, x is the inverse of b. when a = 1, x is the same as b. |
D. | using a as the control, when a = 0, x is the inverse of b. when a = 1, x is the inverse of b. |
Answer» B. using a as the control, when a = 0, x is the same as b. when a = 1, x is the inverse of b. |
28. |
In a flash analog-to-digital converter, the output of each comparator is connected to an input of a ________. |
A. | decoder |
B. | priority encoder |
C. | multiplexer |
D. | demultiplexer |
Answer» B. priority encoder |
29. |
Which term applies to the maintaining of a given signal level until the next sampling? |
A. | holding |
B. | aliasing |
C. | shannon frequency sampling |
D. | "stair-stepping" |
Answer» A. holding |
30. |
An op-amp has very ________. |
A. | high voltage gain |
B. | high input impedance |
C. | low output impedance |
D. | all of the above |
Answer» D. all of the above |
31. |
The dual-slope analog-to-digital converter finds extensive use in ________. |
A. | digital voltmeters |
B. | function generators |
C. | frequency counters |
D. | all of the above |
Answer» D. all of the above |
32. |
The ADC0804 is an example of a ________. |
A. | single-slope analog-to-digital converter |
B. | dual-slope analog-to-digital converter |
C. | digital-ramp analog-to-digital converter |
D. | successive-approximation analog-to-digital converter |
Answer» D. successive-approximation analog-to-digital converter |
33. |
In a digital representation of voltages using an 8-bit binary code, how many values can be defined? |
A. | 16 |
B. | 64 |
C. | 128 |
D. | 256 |
Answer» D. 256 |
34. |
A 4-bit R/2R ladder digital-to-analog converter uses ________. |
A. | one resistor value |
B. | two resistor values |
C. | three resistor values |
D. | four resistor values |
Answer» B. two resistor values |
35. |
A binary-weighted-input digital-to-analog converter has a feedback resistor, Rf, of 12 k. If 50 A of current is through the resistor, voltage out of the circuit is ________. |
A. | 0.6 v |
B. | –0.6 v |
C. | 0.1 v |
D. | –0.1 v |
Answer» B. –0.6 v |
36. |
The resolution of a 6-bit DAC is ________. |
A. | 63% |
B. | 64% |
C. | 15.9% |
D. | 1.59% |
Answer» D. 1.59% |
37. |
How are unwanted frequencies removed prior to digital conversion? |
A. | pre-filters |
B. | digital signal processing |
C. | sample-and-hold circuits |
D. | all of the above |
Answer» A. pre-filters |
38. |
Which type of programming is typically used for digital signal processors? |
A. | assembly language |
B. | machine language |
C. | c |
D. | none of the above |
Answer» A. assembly language |
39. |
Which of the following best defines Nyquist frequency? |
A. | the frequency of resonance for the filtering circuit |
B. | the second harmonic |
C. | the lower frequency limit of sampling |
D. | the highest frequency component of a given analog signal |
Answer» D. the highest frequency component of a given analog signal |
40. |
Which is not an A/D conversion error? |
A. | differential nonlinearity |
B. | missing code |
C. | incorrect code |
D. | offset |
Answer» A. differential nonlinearity |
41. |
Settling time is normally defined as the time it takes a DAC to settle within ________. |
A. | 1/8 lsb of its final value when a change occurs in the input code |
B. | 1/4 lsb of its final value when a change occurs in the input code |
C. | 1/2 lsb of its final value when a change occurs in the input code |
D. | 1 lsb of its final value when a change occurs in the input code |
Answer» C. 1/2 lsb of its final value when a change occurs in the input code |
42. |
Determine the output frequency for a frequency division circuit that contains 12 flip-flops with an input clock frequency of 20.48 MHz. |
A. | 10.24 khz |
B. | 5 khz |
C. | 30.24 khz |
D. | 15 khz |
Answer» B. 5 khz |
43. |
Which statement BEST describes the operation of a negative-edge-triggered D flip-flop? |
A. | the logic level at the d input is transferred to q on ngt of clk. |
B. | the q output is always identical to the clk input if the d input is high. |
C. | the q output is always identical to the d input when clk = pgt. |
D. | the q output is always identical to the d input. |
Answer» A. the logic level at the d input is transferred to q on ngt of clk. |
44. |
Propagation delay time, tPLH, is measured from the ________. |
A. | triggering edge of the clock pulse to the low-to-high transition of the output |
B. | triggering edge of the clock pulse to the high-to-low transition of the output |
C. | preset input to the low-to-high transition of the output |
D. | clear input to the high-to-low transition of the output |
Answer» A. triggering edge of the clock pulse to the low-to-high transition of the output |
45. |
How is a J-K flip-flop made to toggle? |
A. | j = 0, k = 0 |
B. | j = 1, k = 0 |
C. | j = 0, k = 1 |
D. | j = 1, k = 1 |
Answer» D. j = 1, k = 1 |
46. |
How many flip-flops are in the 7475 IC? |
A. | 1 |
B. | 2 |
C. | 4 |
D. | 8 |
Answer» C. 4 |
47. |
How many flip-flops are required to produce a divide-by-128 device? |
A. | 1 |
B. | 4 |
C. | 6 |
D. | 7 |
Answer» D. 7 |
48. |
The ________ circuit overcomes the problem of switching caused by jitter on the inputs. |
A. | astable multivibrator |
B. | monostable multivibrator |
C. | bistable multivibrator |
D. | schmitt trigger |
Answer» D. schmitt trigger |
49. |
Why would a delay gate be needed for a digital circuit? |
A. | a delay gate is never needed. |
B. | to provide for setup times |
C. | to provide for hold times |
D. | to provide for setup times and hold times |
Answer» D. to provide for setup times and hold times |
50. |
A Schmitt trigger has VT+ = 2.0 V and VT– = 1.2 V. What is the hysteresis voltage of the Schmitt trigger? |
A. | 0.4 volt |
B. | 0.6 volt |
C. | 0.8 volt |
D. | 1.2 volts |
Answer» C. 0.8 volt |
51. |
Which of the following circuit parameters would be most likely to limit the maximum operating frequency of a flip-flop? |
A. | setup and hold time |
B. | clock pulse high and low time |
C. | propagation delay time |
D. | clock transition time |
Answer» C. propagation delay time |
52. |
What is the result of taking more samples during the quantization process? |
A. | more errors in the analog-to-digital conversion |
B. | more bit requirements |
C. | more accurate signal representation |
D. | more bit requirements and more accurate signal representation |
Answer» D. more bit requirements and more accurate signal representation |
53. |
Which A/D conversion method has a fixed conversion time? |
A. | single-slope analog-to-digital converter |
B. | dual-slope analog-to-digital converter |
C. | digital-ramp analog-to-digital converter |
D. | successive-approximation analog-to-digital converter |
Answer» D. successive-approximation analog-to-digital converter |
54. |
Which is a typical application of digital signal processing? |
A. | noise elimination |
B. | music signal processing |
C. | image processing |
D. | all of the above |
Answer» D. all of the above |
55. |
If a DAC has a full-scale, or maximum, output of 12 V and accuracy of 0.1%, then the maximum error for any output voltage is ________. |
A. | 12 v |
B. | 120 mv |
C. | 12 mv |
D. | 0 v |
Answer» C. 12 mv |
56. |
What do we call the manipulation of an analog signal in a digital domain? |
A. | analog-to-digital conversion |
B. | digital-to-analog conversion |
C. | digital signal processing |
D. | signal filtering |
Answer» B. digital-to-analog conversion |
57. |
How many address bits are needed to select all memory locations in the 2118 16K × 1 RAM? |
A. | 8 |
B. | 10 |
C. | 14 |
D. | 16 |
Answer» C. 14 |
58. |
The check sum method of testing a ROM: |
A. | indicates if the data in more than one memory location is incorrect. |
B. | provides a means for locating and correcting data errors in specific memory locations. |
C. | allows data errors to be pinpointed to a specific memory location. |
D. | simply indicates that the contents of the rom are incorrect. |
Answer» D. simply indicates that the contents of the rom are incorrect. |
59. |
Refer to the given figures (a) and (b). A logic analyzer is used to check the circuit in figure (a) and displays the waveforms shown in figure (b). The actual analyzer display shows all four data outputs, Q0-Q3. The analyzer's cursor is placed at position X and all four of the data output lines show a LOW level output. What is wrong, if anything, with the circuit? |
A. | nothing is wrong, according to the display. the outputs are in the open state and should show zero output voltage. |
B. | the circuit is in the read mode and the outputs, q0-q3, should reflect the contents of the memory at that address. the chip is defective; replace the chip. |
C. | the circuit is in the mode and should be writing the contents of the selected address to q0–q3. |
D. | the q0–q3 lines can be either low or high, since the chip is in the tristate mode in which case their level is unpredictable. |
Answer» D. the q0–q3 lines can be either low or high, since the chip is in the tristate mode in which case their level is unpredictable. |
60. |
What is the meaning of RAM, and what is its primary role? |
A. | readily available memory; it is the first level of memory used by the computer in all of its operations. |
B. | random access memory; it is memory that can be reached by any sub- system within a computer, and at any time. |
C. | random access memory; it is the memory used for short-term temporary data storage within the computer. |
D. | resettable automatic memory; it is memory that can be used and then automatically reset, or cleared, after being read from or written to. |
Answer» C. random access memory; it is the memory used for short-term temporary data storage within the computer. |
61. |
The storage element for a static RAM is the ________. |
A. | diode |
B. | resistor |
C. | capacitor |
D. | flip-flop |
Answer» D. flip-flop |
62. |
In a DRAM, what is the state of R/W during a read operation? |
A. | low |
B. | high |
C. | hi-z |
D. | none of the above |
Answer» B. high |
63. |
The condition occurring when two or more devices try to write data to a bus simultaneously is called ________. |
A. | address decoding |
B. | bus contention |
C. | bus collisions |
D. | address multiplexing |
Answer» B. bus contention |
64. |
The difference between a PLA and a PAL is: |
A. | the pla has a programmable or plane and a programmable and plane, while the pal only has a programmable and plane. |
B. | the pal has a programmable or plane and a programmable and plane, while the pla only has a programmable and plane. |
C. | the pal has more possible product terms than the pla. |
D. | pals and plas are the same thing. |
Answer» A. the pla has a programmable or plane and a programmable and plane, while the pal only has a programmable and plane. |
65. |
ALM is the acronym for ________. |
A. | array logic matrix |
B. | arithmetic logic module |
C. | asynchronous local modulator |
D. | adaptive logic module |
Answer» D. adaptive logic module |
66. |
The GAL16V8 has: |
A. | 16 dedicated inputs. |
B. | 8 special function pins. |
C. | 8 pins that are used as inputs or outputs. |
D. | all of the above |
Answer» C. 8 pins that are used as inputs or outputs. |
67. |
PALs tend to execute ________ logic. |
A. | sap |
B. | sop |
C. | pla |
D. | spd |
Answer» B. sop |
68. |
How many pins are in an EDF10K70 package? |
A. | 70 |
B. | 140 |
C. | 240 |
D. | 532 |
Answer» C. 240 |
69. |
Convert hexadecimal value 16 to decimal. |
A. | 2210 |
B. | 1610 |
C. | 1010 |
D. | 2010 |
Answer» A. 2210 |
70. |
Convert the following decimal number to 8-bit binary. |
A. | 101110112 |
B. | 110111012 |
C. | 101111012 |
D. | 101111002 |
Answer» A. 101110112 |
71. |
Convert binary 111111110010 to hexadecimal. |
A. | ee216 |
B. | ff216 |
C. | 2fe16 |
D. | fd216 |
Answer» B. ff216 |
72. |
Convert the binary number 1001.00102 to decimal. |
A. | 90.125 |
B. | 9.125 |
C. | 125 |
D. | 12.5 |
Answer» B. 9.125 |
73. |
One hex digit is sometimes referred to as a(n): |
A. | byte |
B. | nibble |
C. | grouping |
D. | instruction |
Answer» B. nibble |
74. |
Which of the following is the most widely used alphanumeric code for computer input and output? |
A. | gray |
B. | ascii |
C. | parity |
D. | ebcdic |
Answer» B. ascii |
75. |
If a typical PC uses a 20-bit address code, how much memory can the CPU address? |
A. | 20 mb |
B. | 10 mb |
C. | 1 mb |
D. | 580 mb |
Answer» C. 1 mb |
76. |
Convert 59.7210 to BCD. |
A. | 111011 |
B. | 01011001.01110010 |
C. | 1110.11 |
D. | 0101100101110010 |
Answer» B. 01011001.01110010 |
77. |
Convert 8B3F16 to binary. |
A. | 35647 |
B. | 011010 |
C. | 1011001111100011 |
D. | 1000101100111111 |
Answer» D. 1000101100111111 |
78. |
Which is typically the longest: bit, byte, nibble, word? |
A. | bit |
B. | byte |
C. | nibble |
D. | word |
Answer» D. word |
79. |
Assign the proper odd parity bit to the code 111001. |
A. | 1111011 |
B. | 1111001 |
C. | 0111111 |
D. | 0011111 |
Answer» B. 1111001 |
80. |
Convert decimal 64 to binary. |
A. | 01010010 |
B. | 01000000 |
C. | 00110110 |
D. | 01001000 |
Answer» B. 01000000 |
81. |
Convert hexadecimal value C1 to binary. |
A. | 11000001 |
B. | 1000111 |
C. | 111000100 |
D. | 111000001 |
Answer» A. 11000001 |
82. |
The given hexadecimal number (1E.53)16 is equivalent to |
A. | (35.684)8 |
B. | (36.246)8 |
C. | (34.340)8 |
D. | (35.599)8 |
Answer» B. (36.246)8 |
83. |
The octal number (651.124)8 is equivalent to |
A. | 16 |
B. | (1b0.10)16 |
C. | (1a8.a3)16 |
D. | (1b0.b0)16 |
Answer» A. 16 |
84. |
The octal equivalent of the decimal number (417)10 is |
A. | (641)8 |
B. | (619)8 |
C. | (640)8 |
D. | (598)8 |
Answer» A. (641)8 |
85. |
Convert the hexadecimal number (1E2)16 to decimal: |
A. | 480 |
B. | 483 |
C. | 482 |
D. | 484 |
Answer» C. 482 |
86. |
(170)10 is equivalent to |
A. | (fd)16 |
B. | (df)16 |
C. | (aa)16 |
D. | (af)16 |
Answer» C. (aa)16 |
87. |
Convert the binary number (01011.1011)2 into decimal: |
A. | (11.6875)10 |
B. | (11.5874)10 |
C. | (10.9876)10 |
D. | (10.7893)10 |
Answer» A. (11.6875)10 |
88. |
1011)2 = (11.6875)10 |
A. | (111101)2 |
B. | (010100)2 |
C. | (111100)2 |
D. | (101010)2 |
Answer» B. (010100)2 |
89. |
On addition of +38 and -20 using 2’s complement, we get |
A. | 11110001 |
B. | 100001110 |
C. | 010010 |
D. | 110101011 |
Answer» C. 010010 |
90. |
On addition of -46 and +28 using 2’s complement, we get |
A. | 00101110 |
B. | 0101110 |
C. | 00101111 |
D. | 1001111 |
Answer» B. 0101110 |
91. |
On subtracting +28 from +29 using 2’s complement, we get |
A. | 11111010 |
B. | 111111001 |
C. | 100001 |
D. | 1 |
Answer» D. 1 |
92. |
The decimal number 10 is represented in its BCD form as |
A. | 10100000 |
B. | 01010111 |
C. | 00010000 |
D. | 00101011 |
Answer» C. 00010000 |
93. |
When numbers, letters or words are represented by a special group of symbols, this process is called |
A. | decoding |
B. | encoding |
C. | digitizing |
D. | inverting |
Answer» B. encoding |
94. |
Carry out BCD subtraction for (68) – (61) using 10’s complement method. |
A. | 00000111 |
B. | 01110000 |
C. | 100000111 |
D. | 011111000 |
Answer» A. 00000111 |
95. |
How many bits would be required to encode decimal numbers 0 to 9999 in straight binary codes? |
A. | 12 |
B. | 14 |
C. | 16 |
D. | 18 |
Answer» B. 14 |
96. |
The decimal equivalent of the excess-3 number 110010100011.01110101 is |
A. | 970.42 |
B. | 1253.75 |
C. | 861.75 |
D. | 1132.87 |
Answer» A. 970.42 |
97. |
In boolean algebra, the OR operation is performed by which properties? |
A. | associative properties |
B. | commutative properties |
C. | distributive properties |
D. | all of the mentioned |
Answer» D. all of the mentioned |
98. |
The expression for Absorption law is given by |
A. | a + ab = a |
B. | a + ab = b |
C. | ab + aa’ = a |
D. | a + b = b + a |
Answer» A. a + ab = a |
99. |
According to boolean law: A + 1 = ? |
A. | 1 |
B. | a |
C. | 0 |
D. | a’ |
Answer» A. 1 |
100. |
The involution of A is equal to |
A. | a |
B. | a’ |
C. | 1 |
D. | 0 |
Answer» A. a |
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