McqMate
| 1. |
for i/o of 8255,if -----, the word is taken as a bit set/rest word |
| A. | d7=1 |
| B. | d7=0 |
| C. | d0=1 |
| D. | d0=0 |
| Answer» B. d7=0 | |
| 2. |
on activation of ----, 8255 loads data from the input port lines into the input buffer of that port |
| A. | stb# |
| B. | ibf |
| C. | obf# |
| D. | none of these |
| Answer» B. ibf | |
| 3. |
8255 has three ----parrallel port |
| A. | 8bit |
| B. | 16bit |
| C. | 32bit |
| D. | 64bit |
| Answer» A. 8bit | |
| 4. |
in ----, bidirectional data transfer is possible |
| A. | mode 0 |
| B. | mode1 |
| C. | mode2 |
| D. | bsr |
| Answer» C. mode2 | |
| 5. |
walkie-talkie is an example of …..serial communication |
| A. | simplex |
| B. | half duplex |
| C. | full duplex |
| D. | none of these |
| Answer» B. half duplex | |
| 6. |
Transmission through telephone lines is an example of….serial commuincation |
| A. | simplex |
| B. | half duplex |
| C. | full duplex |
| D. | none of these |
| Answer» C. full duplex | |
| 7. |
Asynchronous serial communication involves |
| A. | start bit |
| B. | stop bits |
| C. | character data |
| D. | all of these |
| Answer» D. all of these | |
| 8. |
to configure 8255 with port A output,Port B input port C lower output and port C upper input |
| A. | mov al,0afh |
| B. | mov al,0aeh |
| C. | mov al,0ceh |
| D. | mov a,0aah |
| Answer» B. mov al,0aeh | |
| 9. |
A high on ---line indicates that the buffer register is empty |
| A. | txrdy |
| B. | txe |
| C. | txc# |
| D. | both b and c |
| Answer» B. txe | |
| 10. |
Adc 0808 uses ----technique |
| A. | successive apraximation |
| B. | single step |
| C. | dual slope |
| D. | flash converter |
| Answer» A. successive apraximation | |
| 11. |
the signals provided by ADC are |
| A. | soc |
| B. | eoc |
| C. | ale |
| D. | all of these |
| Answer» D. all of these | |
| 12. |
Flash ADC consist of….converters |
| A. | 2^n |
| B. | 2^n -1 |
| C. | 2^n +1 |
| D. | none of these |
| Answer» B. 2^n -1 | |
| 13. |
8253/54 has ----independent timers/counters |
| A. | 1 |
| B. | 2 |
| C. | 3 |
| D. | 4 |
| Answer» C. 3 | |
| 14. |
8253/54 timers can be programmed in---modes |
| A. | 1 |
| B. | 3 |
| C. | 6 |
| D. | 5 |
| Answer» C. 6 | |
| 15. |
in mode 0 of 8253/54 ----disables counting |
| A. | gate=1 |
| B. | gate=0 |
| C. | wr#=1 |
| D. | wr#=0 |
| Answer» B. gate=0 | |
| 16. |
8253/54 has c----command that allows the user to check the count value programmed mode and current status of the counter |
| A. | write back |
| B. | write ahead |
| C. | read ahead |
| D. | read back |
| Answer» D. read back | |
| 17. |
for mode 3 of 8253/54, if the count is odd the output will be high for--- |
| A. | 2/(n+1) |
| B. | (n+1)/2 |
| C. | 2/(n-1) |
| D. | (n-1)/2 |
| Answer» B. (n+1)/2 | |
| 18. |
EOC means |
| A. | end of conversion |
| B. | enable output conversion |
| C. | error of conversion |
| D. | none of these |
| Answer» A. end of conversion | |
| 19. |
ADC 0808 is ----- pin IC |
| A. | 40 |
| B. | 20 |
| C. | 24 |
| D. | 28 |
| Answer» D. 28 | |
| 20. |
ADC 0808 operates on single ---- power supply |
| A. | 5v |
| B. | 10v |
| C. | 15v |
| D. | 20v |
| Answer» A. 5v | |
| 21. |
8255 has -------- i/o pins |
| A. | 28 |
| B. | 26 |
| C. | 24 |
| D. | 22 |
| Answer» C. 24 | |
| 22. |
8255 has three ----parallel ports |
| A. | 8 bit |
| B. | 16 bit |
| C. | 32 bit |
| D. | 64 bit |
| Answer» A. 8 bit | |
| 23. |
In 8255 ,BSR means ----- |
| A. | bit set/reset |
| B. | byteset/reset |
| C. | binary set/reset |
| D. | none |
| Answer» A. bit set/reset | |
| 24. |
BSR mode is used to set or reset the bitsin |
| A. | porta |
| B. | portb |
| C. | portc |
| D. | portd |
| Answer» C. portc | |
| 25. |
8255 has ----i/o modes |
| A. | 2 |
| B. | 3 |
| C. | 4 |
| D. | 8 |
| Answer» B. 3 | |
| 26. |
A high on ----pin causes all 24 lines of three 8 bit ports to be in the input mode |
| A. | wr\ |
| B. | reset |
| C. | gnd |
| D. | vcc |
| Answer» B. reset | |
| 27. |
For i/o mode of 8255,if -----,the word is taken as a mode definition word |
| A. | d7=1 |
| B. | d7=0 |
| C. | d0=1 |
| D. | d0=0 |
| Answer» A. d7=1 | |
| 28. |
For i/o mode of 8255 ,if -----, the word is taken as a bit set/reset word |
| A. | d7=1 |
| B. | d7=0 |
| C. | d0=1 |
| D. | d0=0 |
| Answer» B. d7=0 | |
| 29. |
On activation of --------,8255 loads data from the input port lines into the input buffer of that port |
| A. | stb\ |
| B. | ibf |
| C. | obf\ |
| D. | none |
| Answer» B. ibf | |
| 30. |
IBF is an active-------- output signal for 8255 |
| A. | high |
| B. | low |
| C. | enable |
| D. | disable |
| Answer» A. high | |
| 31. |
8255 sets INTR when STB'=-----,IBF=---------,INTE=--------,for input conrol signals |
| A. | 1,0,1 |
| B. | 1,1,0 |
| C. | 1,1,1 |
| D. | 0,1,1 |
| Answer» C. 1,1,1 | |
| 32. |
Upon activation of------ signal,output device reads data from output port and acknowledges it |
| A. | intr |
| B. | ack\ |
| C. | obf\ |
| D. | ibf |
| Answer» C. obf\ | |
| 33. |
In ------ of 8255 ,bidirectionali/o data transfer is possible |
| A. | mode0 |
| B. | mode1 |
| C. | mode2 |
| D. | bsr mode |
| Answer» C. mode2 | |
| 34. |
Walkie-talkie is an example of serial communication |
| A. | simplex |
| B. | half-duplex |
| C. | full-duplex |
| D. | none |
| Answer» B. half-duplex | |
| 35. |
Asynchronous serial communication involves transmission of |
| A. | start bit |
| B. | stop bit |
| C. | character data |
| D. | all |
| Answer» D. all | |
| 36. |
Whichof the following is the fastest ADC |
| A. | dual slope |
| B. | successive approximation |
| C. | flash |
| D. | single slope |
| Answer» C. flash | |
| 37. |
To indicate end of conversion ADC 0808/0809 ACTIVATES -----SIGNAL |
| A. | eoc |
| B. | soc |
| C. | clk |
| D. | output control |
| Answer» A. eoc | |
| 38. |
Conversion time Tc of successive approximation ADC is given as |
| A. | t(n-1) |
| B. | t(n+1) |
| C. | t(n) |
| D. | t(n+2) |
| Answer» B. t(n+1) | |
| 39. |
Conversion time of ADC 0808 IS |
| A. | 100 ms |
| B. | 100micro sec |
| C. | 100 ms |
| D. | 100ns |
| Answer» B. 100micro sec | |
| 40. |
ADC 0809 IS A ----- PIN IC |
| A. | 40 |
| B. | 20 |
| C. | 24 |
| D. | 28 |
| Answer» D. 28 | |
| 41. |
Which is 16 Bit microprocessor: |
| A. | 8088 |
| B. | 8086 |
| C. | 8085 |
| D. | all of these |
| Answer» D. all of these | |
| 42. |
How many speed of 8088,8085,8086 microprocessor: |
| A. | 2.5 million instruction per second |
| B. | 1.5 million instruction per second |
| C. | 3.5 million instruction per second |
| D. | 1.6 million instruction per second |
| Answer» A. 2.5 million instruction per second | |
| 43. |
Which processor provided 1 MB memory: |
| A. | 16-bit 8086 and 8088 |
| B. | 32-bit 8086 and 8088 |
| C. | 64-bit 8086 and 8088 |
| D. | 8-bit 8086 and 8088 |
| Answer» A. 16-bit 8086 and 8088 | |
| 44. |
The stack pointer in the microprocessor is a |
| A. | 16 bit register that point to stack |
| B. | 32 bit accumulator |
| C. | memory location in the stack |
| D. | flag register used for the stack |
| Answer» A. 16 bit register that point to stack | |
| 45. |
The register which holds the address of the location to or from which data are to be transferred is called |
| A. | index register |
| B. | instruction register |
| C. | memory address register |
| D. | memory data register |
| Answer» C. memory address register | |
| 46. |
The register which contains the data to be written into or read out of the addressed location is called |
| A. | memory address register |
| B. | memory data register |
| C. | program counter |
| D. | index register |
| Answer» B. memory data register | |
| 47. |
Which of the following is used as storage locations both in the ALU and the control section of a computer ? |
| A. | accumulator |
| B. | register |
| C. | adder |
| D. | decoder |
| Answer» B. register | |
| 48. |
The register used as a working area in CPU is |
| A. | program counter |
| B. | instruction register |
| C. | instruction decoder |
| D. | accumulator |
| Answer» D. accumulator | |
| 49. |
The device which is used to connect a peripheral to bus is called |
| A. | control register |
| B. | interface |
| C. | communicatio n protocol |
| D. | none of these |
| Answer» B. interface | |
| 50. |
Which of the following is a set of general purpose internal registers ? |
| A. | stack |
| B. | scratch pad |
| C. | address register |
| D. | status register |
| Answer» B. scratch pad | |
| 51. |
Which of the following register is used in the control unit of the CPU to indicate the next instruction which is to be executed ? |
| A. | accumulator |
| B. | index register |
| C. | instruction decoder |
| D. | program counter |
| Answer» D. program counter | |
| 52. |
Which of the following is not typically found in the status register of a micro processor ? |
| A. | overlow |
| B. | zero result |
| C. | negative result |
| D. | none of the above |
| Answer» D. none of the above | |
| 53. |
The register which keeps track of the execution of a program and which contains the memory address of the instruction currently being executed is called |
| A. | index register |
| B. | memory address register |
| C. | program counter |
| D. | instruction register |
| Answer» D. instruction register | |
| 54. |
Which of the following register holds the information before going to the memory ? |
| A. | control register |
| B. | data register |
| C. | accumulator |
| D. | address register |
| Answer» B. data register | |
| 55. |
Which of the following register is used in the control unit of the CPU to indicate the next instruction which is to be executed |
| A. | accumulator |
| B. | index register |
| C. | instruction decoder |
| D. | program counter |
| Answer» D. program counter | |
| 56. |
In 8086 the following has the higest priority among all the interrupts |
| A. | nmi |
| B. | div o |
| C. | type 255 |
| D. | over flow |
| Answer» A. nmi | |
| 57. |
A set of register which contain |
| A. | data |
| B. | memory addresses |
| C. | result |
| D. | all of these |
| Answer» D. all of these | |
| 58. |
PC stands for: |
| A. | program counter |
| B. | points counter |
| C. | paragraph counter |
| D. | paint counter |
| Answer» A. program counter | |
| 59. |
SP stands for: |
| A. | status pointer |
| B. | stack pointer |
| C. | a and b |
| D. | none of these |
| Answer» B. stack pointer | |
| 60. |
Causing a flag to became 0 is called: |
| A. | clearing a flag |
| B. | case a flag |
| C. | both a and b |
| D. | none of these |
| Answer» A. clearing a flag | |
| 61. |
Which are the flags of status register: |
| A. | over flow flag |
| B. | carry flag/ interrupt flag |
| C. | zero flag |
| D. | all of these |
| Answer» D. all of these | |
| 62. |
executed: |
| A. | instruction register |
| B. | register |
| C. | both a and b |
| D. | none of these |
| Answer» A. instruction register | |
| 63. |
The subprogram finish the return instruction recovers the return address from the: |
| A. | stack |
| B. | queue |
| C. | accumulator |
| D. | data register |
| Answer» A. stack | |
| 64. |
The processor uses the stack to keep track of where the items are stored on it this by using the: |
| A. | stack pointer register |
| B. | queue pointer register |
| C. | both a & b |
| D. | none of these |
| Answer» A. stack pointer register | |
| 65. |
Stack words on: |
| A. | lilo |
| B. | lifo |
| C. | fifo |
| D. | none of these |
| Answer» B. lifo | |
| 66. |
Which is the basic stack operation: |
| A. | push |
| B. | pop |
| C. | both a and b |
| D. | none of these |
| Answer» C. both a and b | |
| 67. |
SP stand for: |
| A. | stack pointer |
| B. | stack pop |
| C. | stack push |
| D. | none of these |
| Answer» A. stack pointer | |
| 68. |
How many bit stored by status register: |
| A. | 1 bit |
| B. | 2 bit |
| C. | 3 bit |
| D. | 4 bit |
| Answer» A. 1 bit | |
| 69. |
The structure of the stack is type structure: |
| A. | first in last out |
| B. | last in last out |
| C. | both a & b |
| D. | none of these |
| Answer» A. first in last out | |
| 70. |
The 16 bit register is separated into groups of 4 bit where each groups is called: |
| A. | bcd |
| B. | nibble |
| C. | half byte |
| D. | none of these |
| Answer» B. nibble | |
| 71. |
A 16 bit address bus can generate addresses: |
| A. | 32767 |
| B. | 25652 |
| C. | 65536 |
| D. | none of these |
| Answer» C. 65536 | |
| 72. |
The processor 80386/80486 and the Pentium processor uses bits address bus: |
| A. | 16 |
| B. | 32 |
| C. | 36 |
| D. | 64 |
| Answer» B. 32 | |
| 73. |
CPU can read & write data by using : |
| A. | control bus |
| B. | data bus |
| C. | address bus |
| D. | none of these |
| Answer» B. data bus | |
| 74. |
Which bus transfer singles from the CPU to external device and others that carry singles from external device to th |
| A. | control bus |
| B. | data bus |
| C. | address bus |
| D. | none of these |
| Answer» A. control bus | |
| 75. |
Using 12 binary digits how many unique house addresses would be possible: |
| A. | 28=256 |
| B. | 212=4096 |
| C. | 216=65536 |
| D. | none of these |
| Answer» B. 212=4096 | |
| 76. |
Each memory location has: |
| A. | address |
| B. | contents |
| C. | both a and b |
| D. | none of these |
| Answer» C. both a and b | |
| 77. |
80386 has ---bit address bus? |
| A. | 8 |
| B. | 16 |
| C. | 32 |
| D. | 64 |
| Answer» C. 32 | |
| 78. |
80386 has – BIT data bus? |
| A. | 8 |
| B. | 16 |
| C. | 32 |
| D. | 64 |
| Answer» C. 32 | |
| 79. |
Which flag are used to record specific characteristics of arithmetic and logical instructions: |
| A. | the stack |
| B. | the stand |
| C. | the status |
| D. | the queue |
| Answer» C. the status | |
| 80. |
The size of each segment in 8086 is: |
| A. | 64 kb |
| B. | 24 kb |
| C. | 50 kb |
| D. | 16kb |
| Answer» A. 64 kb | |
| 81. |
The pin configuration of 8086 is available in the : |
| A. | 40 pin |
| B. | 50 |
| C. | 20 |
| D. | 30 |
| Answer» A. 40 pin | |
| 82. |
DIP stand for: |
| A. | deal inline package |
| B. | dual inline package |
| C. | direct inline package |
| D. | digital inline package |
| Answer» B. dual inline package | |
| 83. |
SBA stand for: |
| A. | segment bus address |
| B. | segment bit address |
| C. | segment base address |
| D. | segment byte address |
| Answer» C. segment base address | |
| 84. |
BP stand for: |
| A. | bit pointer |
| B. | base pointer |
| C. | bus pointer |
| D. | byte pointer |
| Answer» B. base pointer | |
| 85. |
ALE stand for: |
| A. | address latch enable |
| B. | address light enable |
| C. | address lower enable |
| D. | address last enable |
| Answer» A. address latch enable | |
| 86. |
The offset of a particular segment varies from : |
| A. | 000h to fffh |
| B. | 0000h to ffffh |
| C. | 00h to ffh |
| D. | 00000h to fffffh |
| Answer» B. 0000h to ffffh | |
| 87. |
by the microprocessor: |
| A. | cache memory |
| B. | data memory |
| C. | main memory |
| D. | all of these |
| Answer» A. cache memory | |
| 88. |
which is the small amount of high- speed memory used to work directly with the microprocessor: |
| A. | cache |
| B. | case |
| C. | cost |
| D. | coos |
| Answer» A. cache | |
| 89. |
The cache usually gets its data from the whenever the instruction or data is required by the CPU: |
| A. | main memory |
| B. | case memory |
| C. | cache memory |
| D. | all of these |
| Answer» A. main memory | |
| 90. |
Which causes the microprocessor to immediately terminate its present activity: |
| A. | reset signal |
| B. | interupt signal |
| C. | both |
| D. | none of these |
| Answer» A. reset signal | |
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