McqMate
1. |
In Reverse Polish notation, expression A*B+C*D is written as |
A. | AB*CD*+ |
B. | A*BCD*+ |
C. | AB*CD+* |
D. | A*B*CD+ |
Answer» A. AB*CD*+ |
2. |
SIMD represents an organization that ______________. |
A. | refers to a computer system capable of processing several programs at the same time. |
B. | represents organization of single computer containing a control unit, processor unit and a memory unit. |
C. | includes many processing units under the supervision of a common control unit |
D. | none of the above. |
Answer» C. includes many processing units under the supervision of a common control unit |
3. |
Floating point representation is used to store |
A. | Boolean values |
B. | whole numbers |
C. | real integers |
D. | integers |
Answer» C. real integers |
4. |
Suppose that a bus has 16 data lines and requires 4 cycles of 250 nsecs each to transfer data. The bandwidth of this bus would be 2 Megabytes/sec. If the cycle time of the bus was reduced to 125 nsecs and the number of cycles required for transfer stayed the same what would the bandwidth of the bus? |
A. | 1 Megabyte/sec |
B. | 4 Megabytes/sec |
C. | 8 Megabytes/sec |
D. | 2 Megabytes/sec |
Answer» D. 2 Megabytes/sec |
5. |
Assembly language |
A. | uses alphabetic codes in place of binary numbers used in machine language |
B. | is the easiest language to write programs |
C. | need not be translated into machine language |
D. | None of these |
Answer» A. uses alphabetic codes in place of binary numbers used in machine language |
6. |
In computers, subtraction is generally carried out by |
A. | 9’s complement |
B. | 10’s complement |
C. | 1’s complement |
D. | 2’s complement |
Answer» D. 2’s complement |
7. |
The amount of time required to read a block of data from a disk into memory is composed of seek time, rotational latency, and transfer time. Rotational latency refers to |
A. | the time its takes for the platter to make a full rotation |
B. | the time it takes for the read-write head to move into position over the appropriate track |
C. | the time it takes for the platter to rotate the correct sector under the head |
D. | none of the above |
Answer» A. the time its takes for the platter to make a full rotation |
8. |
What characteristic of RAM memory makes it not suitable for permanent storage? |
A. | too slow |
B. | unreliable |
C. | it is volatile |
D. | too bulky |
Answer» C. it is volatile |
9. |
Computers use addressing mode techniques for _____________________. |
A. | giving programming versatility to the user by providing facilities as pointers to memory counters for loop control |
B. | to reduce no. of bits in the field of instruction |
C. | specifying rules for modifying or interpreting address field of the instruction |
D. | All the above |
Answer» D. All the above |
10. |
The circuit used to store one bit of data is known as |
A. | Register |
B. | Encoder |
C. | Decoder |
D. | Flip Flop |
Answer» D. Flip Flop |
11. |
(2FAOC) 16 is equivalent to |
A. | (195 084) 10 |
B. | (001011111010 0000 1100) 2 |
C. | Both (A) and (B) |
D. | None of these |
Answer» B. (001011111010 0000 1100) 2 |
12. |
The average time required to reach a storage location in memory and obtain its contents is called the |
A. | seek time |
B. | turnaround time |
C. | access time |
D. | transfer time |
Answer» C. access time |
13. |
Which of the following is not a weighted code? |
A. | Decimal Number system |
B. | Excess 3-cod |
C. | Binary number System |
D. | None of these |
Answer» B. Excess 3-cod |
14. |
The idea of cache memory is based |
A. | on the property of locality of reference |
B. | on the heuristic 90-10 rule |
C. | on the fact that references generally tend to cluster |
D. | all of the above |
Answer» A. on the property of locality of reference |
15. |
Which of the following is lowest in memory hierarchy? |
A. | Cache memory |
B. | Secondary memory |
C. | Registers |
D. | RAM |
Answer» B. Secondary memory |
16. |
The addressing mode used in an instruction of the form ADD X Y, is |
A. | Absolute |
B. | indirect |
C. | index |
D. | none of these |
Answer» C. index |
17. |
If memory access takes 20 ns with cache and 110 ns with out it, then the ratio ( cache uses a 10 ns memory) is |
A. | 93% |
B. | 90% |
C. | 88% |
D. | 87% |
Answer» B. 90% |
18. |
In a memory-mapped I/O system, which of the following will not be there? |
A. | LDA |
B. | IN |
C. | ADD |
D. | OUT |
Answer» A. LDA |
19. |
In a vectored interrupt. |
A. | the branch address is assigned to a fixed location in memory. |
B. | the interrupting source supplies the branch information to the processor through an interrupt vector. |
C. | the branch address is obtained from a register in the processor |
D. | none of the above |
Answer» B. the interrupting source supplies the branch information to the processor through an interrupt vector. |
20. |
Von Neumann architecture is |
A. | SISD |
B. | SIMD |
C. | MIMD |
D. | MISD |
Answer» A. SISD |
21. |
The circuit used to store one bit of data is known as |
A. | Encoder |
B. | OR gate |
C. | Flip Flop |
D. | Decoder |
Answer» C. Flip Flop |
22. |
Cache memory acts between |
A. | CPU and RAM |
B. | RAM and ROM |
C. | CPU and Hard Disk |
D. | None of these |
Answer» A. CPU and RAM |
23. |
Write Through technique is used in which memory for updating the data |
A. | Virtual memory |
B. | Main memory |
C. | Auxiliary memory |
D. | Cache memory |
Answer» D. Cache memory |
24. |
Generally Dynamic RAM is used as main memory in a computer system as it |
A. | Consumes less power |
B. | has higher speed |
C. | has lower cell density |
D. | needs refreshing circuitary |
Answer» B. has higher speed |
25. |
In signed-magnitude binary division, if the dividend is (11100) 2 and divisor is (10011) 2 then the result is |
A. | (00100) 2 |
B. | (10100) 2 |
C. | (11001) 2 |
D. | (01100) 2 |
Answer» B. (10100) 2 |
26. |
Virtual memory consists of |
A. | Static RAM |
B. | Dynamic RAM |
C. | Magnetic memory |
D. | None of these |
Answer» A. Static RAM |
27. |
In a program using subroutine call instruction, it is necessary |
A. | initialise program counter |
B. | Clear the accumulator |
C. | Reset the microprocessor |
D. | Clear the instruction register |
Answer» D. Clear the instruction register |
28. |
A Stack-organised Computer uses instruction of |
A. | Indirect addressing |
B. | Two-addressing |
C. | Zero addressing |
D. | Index addressing |
Answer» C. Zero addressing |
29. |
If the main memory is of 8K bytes and the cache memory is of 2K words. It uses associative mapping. Then each word of cache memory shall be |
A. | 11 bits |
B. | 21 bits |
C. | 16 bits |
D. | 20 bits |
Answer» C. 16 bits |
30. |
A-Flip Flop can be converted into T-Flip Flop by using additional logic circuit |
A. | n TQD =• |
B. | T D = |
C. | D = T . Q n |
D. | n TQD =⊕ |
Answer» D. n TQD =⊕ |
31. |
Logic X-OR operation of (4ACO) H & (B53F) H results |
A. | AACB |
B. | 0000 |
C. | FFFF |
D. | ABCD |
Answer» C. FFFF |
32. |
When CPU is executing a Program that is part of the Operating System, it is said to be in |
A. | Interrupt mode |
B. | System mode |
C. | Half mode |
D. | Simplex mode |
Answer» B. System mode |
33. |
An n-bit microprocessor has |
A. | n-bit program counter |
B. | n-bit address register |
C. | n-bit ALU |
D. | n-bit instruction register |
Answer» D. n-bit instruction register |
34. |
Cache memory works on the principle of |
A. | Locality of data |
B. | Locality of memory |
C. | Locality of reference |
D. | Locality of reference & memory |
Answer» C. Locality of reference |
35. |
The main memory in a Personal Computer (PC) is made of |
A. | cache memory. |
B. | static RAM |
C. | Dynamic Ram |
D. | both (A) and (B) . |
Answer» D. both (A) and (B) . |
36. |
In computers, subtraction is carried out generally by |
A. | 1's complement method |
B. | 2's complement method |
C. | signed magnitude method |
D. | BCD subtraction method |
Answer» B. 2's complement method |
37. |
PSW is saved in stack when there is a |
A. | interrupt recognised |
B. | execution of RST instruction |
C. | Execution of CALL instruction |
D. | All of these |
Answer» A. interrupt recognised |
38. |
The multiplicand register & multiplier register of a hardware circuit implementing booth's algorithm have (11101) & (1100). The result shall be |
A. | (812) 10 |
B. | (-12) 10 |
C. | (12) 10 |
D. | (-812) 10 |
Answer» A. (812) 10 |
39. |
The circuit converting binary data in to decimal is |
A. | Encoder |
B. | Multiplexer |
C. | Decoder |
D. | Code converter |
Answer» D. Code converter |
40. |
A three input NOR gate gives logic high output only when |
A. | one input is high |
B. | one input is low |
C. | two input are low |
D. | all input are high |
Answer» D. all input are high |
41. |
n bits in operation code imply that there are ___________ possible distinct operators |
A. | 2n |
B. | 2n |
C. | n/2 |
D. | n2 |
Answer» B. 2n |
42. |
_________ register keeps tracks of the instructions stored in program stored in memory. |
A. | AR (Address Register) |
B. | XR (Index Register) |
C. | PC (Program Counter) |
D. | AC (Accumulator) |
Answer» C. PC (Program Counter) |
43. |
Memory unit accessed by content is called |
A. | Read only memory |
B. | Programmable Memory |
C. | Virtual Memory |
D. | Associative Memory |
Answer» D. Associative Memory |
44. |
‘Aging registers’ are |
A. | Counters which indicate how long ago their associated pages have been referenced. |
B. | Registers which keep track of when the program was last accessed. |
C. | Counters to keep track of last accessed instruction. |
D. | Counters to keep track of the latest data structures referred. |
Answer» A. Counters which indicate how long ago their associated pages have been referenced. |
45. |
The instruction ‘ORG O’ is a |
A. | Machine Instruction. |
B. | Pseudo instruction. |
C. | High level instruction. |
D. | Memory instruction. |
Answer» B. Pseudo instruction. |
46. |
Translation from symbolic program into Binary is done in |
A. | Two passes. |
B. | Directly |
C. | Three passes. |
D. | Four passes. |
Answer» A. Two passes. |
47. |
A floating point number that has a O in the MSB of mantissa is said to have |
A. | Overflow |
B. | Underflow |
C. | Important number |
D. | Undefined |
Answer» B. Underflow |
48. |
The BSA instruction is |
A. | Branch and store accumulator |
B. | Branch and save return address |
C. | Branch and shift address |
D. | Branch and show accumulator |
Answer» B. Branch and save return address |
49. |
Logic gates with a set of input and outputs is arrangement of |
A. | Combinational circuit |
B. | Logic circuit |
C. | Design circuits |
D. | Register |
Answer» A. Combinational circuit |
50. |
MIMD stands for |
A. | Multiple instruction multiple data |
B. | Multiple instruction memory data |
C. | Memory instruction multiple data |
D. | Multiple information memory data |
Answer» A. Multiple instruction multiple data |
51. |
A k-bit field can specify any one of |
A. | 3k registers |
B. | 2k registers |
C. | K2 registers |
D. | K3 registers |
Answer» B. 2k registers |
52. |
The time interval between adjacent bits is called the |
A. | Word-time |
B. | Bit-time |
C. | Turn around time |
D. | Slice time |
Answer» B. Bit-time |
53. |
A group of bits that tell the computer to perform a specific operation is known as |
A. | Instruction code |
B. | Micro-operation |
C. | Accumulator |
D. | Register |
Answer» A. Instruction code |
54. |
The load instruction is mostly used to designate a transfer from memory to a processor register known as |
A. | Accumulator |
B. | Instruction Register |
C. | Program counter |
D. | Memory address Register |
Answer» A. Accumulator |
55. |
The communication between the components in a microcomputer takes place via the address and |
A. | I/O bus |
B. | Data bus |
C. | Address bus |
D. | Control lines |
Answer» B. Data bus |
56. |
An instruction pipeline can be implemented by means of |
A. | LIFO buffer |
B. | FIFO buffer |
C. | Stack |
D. | None of the above |
Answer» B. FIFO buffer |
57. |
Data input command is just the opposite of a |
A. | Test command |
B. | Control command |
C. | Data output |
D. | Data channel |
Answer» C. Data output |
58. |
A microprogram sequencer |
A. | generates the address of next micro instruction to be executed. |
B. | generates the control signals to execute a microinstruction. |
C. | sequentially averages all microinstructions in the control memory. |
D. | enables the efficient handling of a micro program subroutine. |
Answer» A. generates the address of next micro instruction to be executed. |
59. |
. A binary digit is called a |
A. | Bit |
B. | Byte |
C. | Number |
D. | Character |
Answer» A. Bit |
60. |
A flip-flop is a binary cell capable of storing information of |
A. | One bit |
B. | Byte |
C. | Zero bit |
D. | Eight bit |
Answer» A. One bit |
61. |
The operation executed on data stored in registers is called |
A. | Macro-operation |
B. | Micro-operation |
C. | Bit-operation |
D. | Byte-operation |
Answer» B. Micro-operation |
62. |
MRI indicates |
A. | Memory Reference Information. |
B. | Memory Reference Instruction. |
C. | Memory Registers Instruction. |
D. | Memory Register information |
Answer» B. Memory Reference Instruction. |
63. |
Self-contained sequence of instructions that performs a given computational task is called |
A. | Function |
B. | Procedure |
C. | Subroutine |
D. | Routine |
Answer» A. Function |
64. |
Microinstructions are stored in control memory groups, with each group specifying a |
A. | Routine |
B. | Subroutine |
C. | Vector |
D. | Address |
Answer» A. Routine |
65. |
An interface that provides a method for transferring binary information between internal storage and external devices is called |
A. | I/O interface |
B. | Input interface |
C. | Output interface |
D. | I/O bus |
Answer» A. I/O interface |
66. |
Status bit is also called |
A. | Binary bit |
B. | Flag bit |
C. | Signed bit |
D. | Unsigned bit |
Answer» B. Flag bit |
67. |
An address in main memory is called |
A. | Physical address |
B. | Logical address |
C. | Memory address |
D. | Word address |
Answer» A. Physical address |
68. |
If the value V(x) of the target operand is contained in the address field itself, the addressing mode is |
A. | immediate. |
B. | direct. |
C. | indirect. |
D. | implied. |
Answer» B. direct. |
69. |
can be represented in a signed magnitude format and in a 1’s complement format as |
A. | 111011 & 100100 |
B. | 100100 & 111011 |
C. | 011011 & 100100 |
D. | 100100 & 011011 |
Answer» A. 111011 & 100100 |
70. |
The instructions which copy information from one location to another either in the processor’s internal register set or in the external main memory are called |
A. | Data transfer instructions. |
B. | Program control instructions. |
C. | Input-output instructions. |
D. | Logical instructions. |
Answer» A. Data transfer instructions. |
71. |
A device/circuit that goes through a predefined sequence of states upon the application of input pulses is called |
A. | register |
B. | flip-flop |
C. | transistor. |
D. | counter. |
Answer» D. counter. |
72. |
The performance of cache memory is frequently measured in terms of a quantity called |
A. | Miss ratio. |
B. | Hit ratio. |
C. | Latency ratio. |
D. | Read ratio. |
Answer» C. Latency ratio. |
73. |
The information available in a state table may be represented graphically in a |
A. | simple diagram. |
B. | state diagram. |
C. | complex diagram. |
D. | data flow diagram. |
Answer» B. state diagram. |
74. |
Content of the program counter is added to the address part of the instruction in order to obtain the effective address is called. |
A. | relative address mode. |
B. | index addressing mode. |
C. | register mode. |
D. | implied mode. |
Answer» A. relative address mode. |
75. |
An interface that provides I/O transfer of data directly to and form the memory unit and peripheral is termed as |
A. | DDA. |
B. | Serial interface. |
C. | BR. |
D. | DMA. |
Answer» D. DMA. |
76. |
The 2s compliment form (Use 6 bit word) of the number 1010 is |
A. | 111100. |
B. | 110110. |
C. | 110111. |
D. | 1011. |
Answer» B. 110110. |
77. |
A register capable of shifting its binary information either to the right or the left is called a |
A. | parallel register. |
B. | serial register. |
C. | shift register. |
D. | storage register. |
Answer» C. shift register. |
78. |
What is the content of Stack Pointer (SP)? |
A. | Address of the current instruction |
B. | Address of the next instruction |
C. | Address of the top element of the stack |
D. | Size of the stack. |
Answer» C. Address of the top element of the stack |
79. |
Which of the following interrupt is non maskable |
A. | INTR. |
B. | RST 7.5. |
C. | RST 6.5. |
D. | TRAP. |
Answer» D. TRAP. |
80. |
Which of the following is a main memory |
A. | Secondary memory. |
B. | Auxiliary memory. |
C. | Cache memory. |
D. | Virtual memory. |
Answer» C. Cache memory. |
81. |
Which of the following are not a machine instructions |
A. | MOV. |
B. | ORG. |
C. | END. |
D. | (B) & (C) . |
Answer» D. (B) & (C) . |
82. |
In Assembly language programming, minimum number of operands required for an instruction is/are |
A. | Zero. |
B. | One. |
C. | Two. |
D. | Both (B) & (C) . |
Answer» A. Zero. |
83. |
The maximum addressing capacity of a micro processor which uses 16 bit database & 32 bit address base is |
A. | 64 K. |
B. | 4 GB. |
C. | both (A) & (B) . |
D. | None of these. |
Answer» B. 4 GB. |
84. |
The memory unit that communicates directly with the CPU is called the |
A. | main memory |
B. | Secondary memory |
C. | shared memory |
D. | auxiliary memory. |
Answer» A. main memory |
85. |
The average time required to reach a storage location in memory and obtain its contents is called |
A. | Latency time. |
B. | Access time. |
C. | Turnaround time. |
D. | Response time. |
Answer» B. Access time. |
86. |
A successive A/D converter is |
A. | a high-speed converter. |
B. | a low speed converter. |
C. | a medium speed converter. |
D. | none of these. |
Answer» C. a medium speed converter. |
87. |
When necessary, the results are transferred from the CPU to main memory by |
A. | I/O devices. |
B. | CPU. |
C. | shift registers. |
D. | none of these. |
Answer» C. shift registers. |
88. |
A combinational logic circuit which sends data coming from a single source to two or more separate destinations is |
A. | Decoder. |
B. | Encoder. |
C. | Multiplexer. |
D. | Demultiplexer. |
Answer» D. Demultiplexer. |
89. |
In which addressing mode the operand is given explicitly in the instruction |
A. | Absolute. |
B. | Immediate . |
C. | Indirect. |
D. | Direct. |
Answer» B. Immediate . |
90. |
A stack organized computer has |
A. | Three-address Instruction. |
B. | Two-address Instruction. |
C. | One-address Instruction. |
D. | Zero-address Instruction. |
Answer» D. Zero-address Instruction. |
91. |
A Program Counter contains a number 825 and address part of the instruction contains the number 24. The effective address in the relative address mode, when an instruction is read from the memory is |
A. | 849. |
B. | 850. |
C. | 801. |
D. | 802. |
Answer» B. 850. |
92. |
A page fault |
A. | Occurs when there is an error in a specific page. |
B. | Occurs when a program accesses a page of main memory. |
C. | Occurs when a program accesses a page not currently in main memory. |
D. | Occurs when a program accesses a page belonging to another program. |
Answer» C. Occurs when a program accesses a page not currently in main memory. |
93. |
The load instruction is mostly used to designate a transfer from memory to a processor register known as____. |
A. | Accumulator |
B. | Instruction Register |
C. | Program counter |
D. | Memory address Register |
Answer» A. Accumulator |
94. |
A group of bits that tell the computer to perform a specific operation is known as____. |
A. | Instruction code |
B. | Micro-operation |
C. | Accumulator |
D. | Register |
Answer» A. Instruction code |
95. |
The time interval between adjacent bits is called the_____. |
A. | Word-time |
B. | Bit-time |
C. | Turn around time |
D. | Slice time |
Answer» B. Bit-time |
96. |
A k-bit field can specify any one of_____. |
A. | 3k registers |
B. | 2k registers |
C. | K2 registers |
D. | K3 registers |
Answer» B. 2k registers |
97. |
MIMD stands for _____. |
A. | Multiple instruction multiple data |
B. | Multiple instruction memory data |
C. | Memory instruction multiple data |
D. | Multiple information memory data |
Answer» A. Multiple instruction multiple data |
98. |
Logic gates with a set of input and outputs is arrangement of______. |
A. | Computational circuit |
B. | Logic circuit |
C. | Design circuits |
D. | Register |
Answer» A. Computational circuit |
99. |
The average time required to reach a storage location in memory and obtain its contents is called_____. |
A. | Latency time. |
B. | Access time. |
C. | Turnaround time. |
D. | Response time. |
Answer» B. Access time. |
100. |
The BSA instruction is______. |
A. | Branch and store accumulator |
B. | Branch and save return address |
C. | Branch and shift address |
D. | Branch and show accumulator |
Answer» B. Branch and save return address |
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