The _____ are connected to 2 address bus line in system

Related MCQs

• The peak bus bandwidth of backside bus (cache bus) is ______ Mbytes/second
• The Microprocessor places __________ address on the address bus
• To interface memory with the microprocessor, connect register the lines of the address bus must be added to address lines of the _______ chip
• The remaining address line of ______ bus is decoded to generate chip select signal
• The pins are _______ data lines and are connected to data bus in system
• The ___ bus controller device decodes the signals to produce the control bus signal
• In 8086 microprocessor , the address bus is ________ bit wide
• There are ________ address bus in 8255A
• The address bus enables the ________ for data transfer.
• The address bus flow in __________.