8086 microprocessor is interfaced to 8253 a programmable interval timer. The maximum number by which the clock frequency on one of the timers is divided by ________________.

Related MCQs

• 8086 is interfaced to two 8259s (Programmable interrupt controllers). If 8259s are in master slave configuration the number of interrupts available to the 8086 microprocessor is _____________.
• 8088 microprocessor differs with 8086 microprocessor in _______.
• The clock signal of frequency upto _____ is supplied to clock input
• Smarts cards may have up to ______ kilobytes of RAM, ___ kilobytes of ROM, ___ kilobytes of programmable ROM, and a 16-bit microprocessor
• In 8086 microprocessor one of the following statements is not true?
• The intel 8086 microprocessor is a _______ processor
• In 8086 microprocessor , the address bus is ________ bit wide
• The 16 bit flag of 8086 microprocessor is responsible to indicate ___________
• BHE of 8086 microprocessor signal is used to interface the _______.
• In 8086 microprocessor the following has the highest priority among all type interrupts?