Two stable states of latches are

Related MCQs

• Latches constructed with NOR and NAND gates tend to remain in the latched condition due to which configuration feature?
• The output of latches will remain in set/reset untill                        
• Why latches are called a memory devices?
• When both inputs of SR latches are low, the latch                        
• When both inputs of SR latches are high, the latch goes                        
• DeMorgan’s theorem states that                    
• Moore machine has                    states than a mealy machine.
• A decimal counter has              states.
• Which type of gate can be used to add two bits?
• The condition occurring when two or more devices try to write data to a bus simultaneously is called ________.