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420+ Digital Electronics Solved MCQs

These multiple-choice questions (MCQs) are designed to enhance your knowledge and understanding in the following areas: Electrical Engineering , Bachelor of Science in Computer Science FY (BSc CS) , Bachelor of Computer Applications (BCA) , Bachelor of Science in Computer Science (BSc CS) .

1.

Any number with an exponent of zero is equal to:

A. zero
B. one
C. that number
D. ten
Answer» B. one
2.

In the decimal numbering system, what is the MSD?

A. the middle digit of a stream of numbers
B. the digit to the right of the decimal point
C. the last digit on the right
D. the digit with the most weight
Answer» D. the digit with the most weight
3.

Which of the following statements does NOT describe an advantage of digital technology?

A. the values may vary over a continuous range.
B. the circuits are less affected by noise.
C. the operation can be programmed.
D. information storage is easy.
Answer» A. the values may vary over a continuous range.
4.

The generic array logic (GAL) device is ________.

A. one-time programmable
B. reprogrammable
C. a cmos device
D. reprogrammable and a cmos device
Answer» B. reprogrammable
5.

The range of voltages between VL(max) and VH(min) are ________.

A. unknown
B. unnecessary
C. unacceptable
D. between 2 v and 5 v
Answer» C. unacceptable
6.

What is a digital-to-analog converter?

A. it takes the digital information from an audio cd and converts it to a usable form.
B. it allows the use of cheaper analog techniques, which are always simpler.
C. it stores digital data on a hard drive.
D. it converts direct current to alternating current.
Answer» A. it takes the digital information from an audio cd and converts it to a usable form.
7.

What are the symbols used to represent digits in the binary number system?

A. 0,1
B. 0,1,2
C. 0 through 8
D. 1,2
Answer» A. 0,1
8.

A full subtracter circuit requires ________.

A. two inputs and two outputs
B. two inputs and three outputs
C. three inputs and one output
D. three inputs and two outputs
Answer» D. three inputs and two outputs
9.

The output of an AND gate is LOW ________.

A. all the time
B. when any input is low
C. when any input is high
D. when all inputs are high
Answer» B. when any input is low
10.

Give the decimal value of binary 10010.

A. 610
B. 910
C. 1810
D. 2010
Answer» C. 1810
11.

Parallel format means that:

A. each digital signal has its own conductor.
B. several digital signals are sent on each conductor.
C. both binary and hexadecimal can be used.
D. no clock is needed.
Answer» A. each digital signal has its own conductor.
12.

A decoder converts ________.

A. noncoded information into coded form
B. coded information into noncoded form
C. highs to lows
D. lows to highs
Answer» B. coded information into noncoded form
13.

A DAC changes ________.

A. an analog signal into digital data
B. digital data into an analog signal
C. digital data into an amplified signal
D. none of the above
Answer» B. digital data into an analog signal
14.

The output of a NOT gate is HIGH when ________.

A. the input is low
B. the input is high
C. the input changes from low to high
D. voltage is removed from the gate
Answer» A. the input is low
15.

The output of an OR gate is LOW when ________.

A. all inputs are low
B. any input is low
C. any input is high
D. all inputs are high
Answer» A. all inputs are low
16.

Which of the following is not an analog device?

A. thermocouple
B. current flow in a circuit
C. light switch
D. audio microphone
Answer» C. light switch
17.

A demultiplexer has ________.

A. one data input and a number of selection inputs, and they have several outputs
B. one input and one output
C. several inputs and several outputs
D. several inputs and one output
Answer» A. one data input and a number of selection inputs, and they have several outputs
18.

A flip-flop has ________.

A. one stable state
B. no stable states
C. two stable states
D. none of the above
Answer» C. two stable states
19.

Digital signals transmitted on a single conductor (and a ground) must be transmitted in:

A. slow speed.
B. parallel.
C. analog.
D. serial.
Answer» D. serial.
20.

In a certain digital waveform, the period is four times the pulse width. The duty cycle is ________.

A. 0%
B. 25%
C. 50%
D. 100%
Answer» B. 25%
21.

Select the statement that best describes the parity method of error detection:

A. parity checking is best suited for detecting double-bit errors that occur during the transmission of codes from one location to another.
B. parity checking is not suitable for detecting single-bit errors in transmitted codes.
C. parity checking is best suited for detecting single-bit errors in transmitted codes.
D. parity checking is capable of detecting and correcting errors in transmitted codes.
Answer» C. parity checking is best suited for detecting single-bit errors in transmitted codes.
22.

A logic circuit that provides a HIGH output for both inputs HIGH or both inputs LOW is a(n):

A. ex-nor gate
B. or gate
C. ex-or gate
D. nand gate
Answer» A. ex-nor gate
23.

A logic circuit that provides a HIGH output if one input or the other input, but not both, is HIGH, is a(n):

A. ex-nor gate
B. or gate
C. ex-or gate
D. nand gate
Answer» C. ex-or gate
24.

Identify the type of gate below from the equation

A. ex-nor gate
B. or gate
C. ex-or gate
D. nand gate
Answer» C. ex-or gate
25.

Parity systems are defined as either________ or ________ and will add an extra ________ tothe digital information being transmitted.

A. positive, negative, byte
B. odd, even, bit
C. upper, lower, digit
D. on, off, decimal
Answer» B. odd, even, bit
26.

Which type of gate can be used to add two bits?

A. ex-or
B. ex-nor
C. ex-nand
D. nor
Answer» A. ex-or
27.

Show from the truth table how an exclusive-OR gate can be used to invert the data on one input if the other input is a special control function.

A. using a as the control, when a = 0, x is the same as b. when a = 1, x is the same as b.
B. using a as the control, when a = 0, x is the same as b. when a = 1, x is the inverse of b.
C. using a as the control, when a = 0, x is the inverse of b. when a = 1, x is the same as b.
D. using a as the control, when a = 0, x is the inverse of b. when a = 1, x is the inverse of b.
Answer» B. using a as the control, when a = 0, x is the same as b. when a = 1, x is the inverse of b.
28.

In a flash analog-to-digital converter, the output of each comparator is connected to an input of a ________.

A. decoder
B. priority encoder
C. multiplexer
D. demultiplexer
Answer» B. priority encoder
29.

Which term applies to the maintaining of a given signal level until the next sampling?

A. holding
B. aliasing
C. shannon frequency sampling
D. "stair-stepping"
Answer» A. holding
30.

An op-amp has very ________.

A. high voltage gain
B. high input impedance
C. low output impedance
D. all of the above
Answer» D. all of the above
31.

The dual-slope analog-to-digital converter finds extensive use in ________.

A. digital voltmeters
B. function generators
C. frequency counters
D. all of the above
Answer» D. all of the above
32.

The ADC0804 is an example of a ________.

A. single-slope analog-to-digital converter
B. dual-slope analog-to-digital converter
C. digital-ramp analog-to-digital converter
D. successive-approximation analog-to-digital converter
Answer» D. successive-approximation analog-to-digital converter
33.

In a digital representation of voltages using an 8-bit binary code, how many values can be defined?

A. 16
B. 64
C. 128
D. 256
Answer» D. 256
34.

A 4-bit R/2R ladder digital-to-analog converter uses ________.

A. one resistor value
B. two resistor values
C. three resistor values
D. four resistor values
Answer» B. two resistor values
35.

A binary-weighted-input digital-to-analog converter has a feedback resistor, Rf, of 12 k. If 50 A of current is through the resistor, voltage out of the circuit is ________.

A. 0.6 v
B. –0.6 v
C. 0.1 v
D. –0.1 v
Answer» B. –0.6 v
36.

The resolution of a 6-bit DAC is ________.

A. 63%
B. 64%
C. 15.9%
D. 1.59%
Answer» D. 1.59%
37.

How are unwanted frequencies removed prior to digital conversion?

A. pre-filters
B. digital signal processing
C. sample-and-hold circuits
D. all of the above
Answer» A. pre-filters
38.

Which type of programming is typically used for digital signal processors?

A. assembly language
B. machine language
C. c
D. none of the above
Answer» A. assembly language
39.

Which of the following best defines Nyquist frequency?

A. the frequency of resonance for the filtering circuit
B. the second harmonic
C. the lower frequency limit of sampling
D. the highest frequency component of a given analog signal
Answer» D. the highest frequency component of a given analog signal
40.

Which is not an A/D conversion error?

A. differential nonlinearity
B. missing code
C. incorrect code
D. offset
Answer» A. differential nonlinearity
41.

Settling time is normally defined as the time it takes a DAC to settle within ________.

A. 1/8 lsb of its final value when a change occurs in the input code
B. 1/4 lsb of its final value when a change occurs in the input code
C. 1/2 lsb of its final value when a change occurs in the input code
D. 1 lsb of its final value when a change occurs in the input code
Answer» C. 1/2 lsb of its final value when a change occurs in the input code
42.

Determine the output frequency for a frequency division circuit that contains 12 flip-flops with an input clock frequency of 20.48 MHz.

A. 10.24 khz
B. 5 khz
C. 30.24 khz
D. 15 khz
Answer» B. 5 khz
43.

Which statement BEST describes the operation of a negative-edge-triggered D flip-flop?

A. the logic level at the d input is transferred to q on ngt of clk.
B. the q output is always identical to the clk input if the d input is high.
C. the q output is always identical to the d input when clk = pgt.
D. the q output is always identical to the d input.
Answer» A. the logic level at the d input is transferred to q on ngt of clk.
44.

Propagation delay time, tPLH, is measured from the ________.

A. triggering edge of the clock pulse to the low-to-high transition of the output
B. triggering edge of the clock pulse to the high-to-low transition of the output
C. preset input to the low-to-high transition of the output
D. clear input to the high-to-low transition of the output
Answer» A. triggering edge of the clock pulse to the low-to-high transition of the output
45.

How is a J-K flip-flop made to toggle?

A. j = 0, k = 0
B. j = 1, k = 0
C. j = 0, k = 1
D. j = 1, k = 1
Answer» D. j = 1, k = 1
46.

How many flip-flops are in the 7475 IC?

A. 1
B. 2
C. 4
D. 8
Answer» C. 4
47.

How many flip-flops are required to produce a divide-by-128 device?

A. 1
B. 4
C. 6
D. 7
Answer» D. 7
48.

The ________ circuit overcomes the problem of switching caused by jitter on the inputs.

A. astable multivibrator
B. monostable multivibrator
C. bistable multivibrator
D. schmitt trigger
Answer» D. schmitt trigger
49.

Why would a delay gate be needed for a digital circuit?

A. a delay gate is never needed.
B. to provide for setup times
C. to provide for hold times
D. to provide for setup times and hold times
Answer» D. to provide for setup times and hold times
50.

A Schmitt trigger has VT+ = 2.0 V and VT– = 1.2 V. What is the hysteresis voltage of the Schmitt trigger?

A. 0.4 volt
B. 0.6 volt
C. 0.8 volt
D. 1.2 volts
Answer» C. 0.8 volt

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