McqMate
These multiple-choice questions (MCQs) are designed to enhance your knowledge and understanding in the following areas: Computer Science Engineering (CSE) , Electronics and Telecommunication Engineering [ENTC] .
| 151. |
Which of the following is the fastest logic |
| A. | ttl |
| B. | ecl |
| C. | cmos |
| D. | lsi |
| Answer» B. ecl | |
| 152. |
The digital logic family which has the lowest propagation delay time is |
| A. | ecl |
| B. | ttl |
| C. | cmos |
| D. | pmos |
| Answer» A. ecl | |
| 153. |
Which TTL logic gate is used for wired ANDing |
| A. | open collector output |
| B. | totem pole |
| C. | tri state output |
| D. | ecl gates |
| Answer» A. open collector output | |
| 154. |
CMOS circuits consume power |
| A. | equal to ttl |
| B. | less than ttl |
| C. | twice of ttl |
| D. | thrice of ttl |
| Answer» B. less than ttl | |
| 155. |
In a positive logic system, logic state 1 corresponds to |
| A. | positive voltage |
| B. | higher voltage level |
| C. | zero voltage level |
| D. | lower voltage level |
| Answer» B. higher voltage level | |
| 156. |
The commercially available 8-input multiplexer integrated circuit in the TTL family is |
| A. | 7495 |
| B. | 74153 |
| C. | 74154 |
| D. | 74151 |
| Answer» B. 74153 | |
| 157. |
The logic 0 level of a CMOS logic device is approximately |
| A. | 1.2 volts |
| B. | 0.4 volts |
| C. | 0volts |
| D. | 5volts |
| Answer» C. 0volts | |
| 158. |
Which ofthe following is a universal logic gate? |
| A. | or |
| B. | xor |
| C. | and |
| D. | nand |
| Answer» D. nand | |
| 159. |
How is the noise margin of a logic family defi ned? |
| A. | voh – vol |
| B. | greater of vdd – voh and vol – gnd |
| C. | smaller of vil – vol and voh – vih |
| D. | vih – vil. |
| Answer» C. smaller of vil – vol and voh – vih | |
| 160. |
What parameter causes the main limit on fan-out of CMOS logic in high-speed applications? |
| A. | d.c. input current |
| B. | output current |
| C. | input capacitance |
| D. | power supply voltage. |
| Answer» A. d.c. input current | |
| 161. |
The number of standard loads that the output of the gate can drive with out impairment of its normal operation is |
| A. | fan-in |
| B. | fan-out |
| C. | noise-margin |
| D. | power- dissipiatio n |
| Answer» B. fan-out | |
| 162. |
Measure of power consumed by the gate when fully driven by all its inputs is |
| A. | fan-in |
| B. | fan-out |
| C. | noise-margin |
| D. | power- dissipiatio n |
| Answer» D. power- dissipiatio n | |
| 163. |
Fan-out is specified in terms of |
| A. | voltage |
| B. | current |
| C. | watt |
| D. | unit load |
| Answer» D. unit load | |
| 164. |
Which of the following logic family has highest fan-out |
| A. | dtl |
| B. | cmos |
| C. | rtl |
| D. | ttl |
| Answer» B. cmos | |
| 165. |
Which of following consume minimum power |
| A. | ttl |
| B. | rtl |
| C. | dtl |
| D. | cmos |
| Answer» D. cmos | |
| 166. |
Among the logic families, low power dissipation is in |
| A. | dtl |
| B. | cmos |
| C. | rtl |
| D. | ttl |
| Answer» B. cmos | |
| 167. |
The temperature in which the performance of the IC is effective |
| A. | operating |
| B. | fan-out |
| C. | normal |
| D. | power- |
| Answer» A. operating | |
| 168. |
The nominal value of the dc supply voltage for TTL (transistor-transistor logic) devices is |
| A. | 0v |
| B. | 5v |
| C. | 10v |
| D. | 15v |
| Answer» B. 5v | |
| 169. |
The average transition delay time for the signal to propagate from input to output when the signals change in value. It is expressed in ns is |
| A. | propogation delay |
| B. | fan-out |
| C. | noise-margin |
| D. | power- dissipiatio n |
| Answer» A. propogation delay | |
| 170. |
the number of inputs connected to the gate without any degradation in the |
| A. | propogation delay |
| B. | fan-out |
| C. | fan- in |
| D. | power- dissipiatio |
| Answer» C. fan- in | |
| 171. |
Which of the following logic gives the complementary outputs? |
| A. | ecl |
| B. | ttl |
| C. | cmos |
| D. | pmos |
| Answer» A. ecl | |
| 172. |
The maximum noise voltage added to an input signal of a digital circuit |
| A. | fan-in |
| B. | fan-out |
| C. | noise-margin |
| D. | power- |
| Answer» C. noise-margin | |
| 173. |
Among the logic families, Slowest logic family is |
| A. | ttl |
| B. | rtl |
| C. | dtl |
| D. | cmos |
| Answer» D. cmos | |
| 174. |
Operating temperature of the IC vary from |
| A. | 0 to70 celsius |
| B. | 0to35celsius |
| C. | 0to 50celsius |
| D. | 0to70celsi |
| Answer» A. 0 to70 celsius | |
| 175. |
1. Open collector output 2. Totem-Pole Output 3. Tri-state output are the type of |
| A. | ttl logic |
| B. | rtl logic |
| C. | cmos logic |
| D. | none of this |
| Answer» A. ttl logic | |
| 176. |
If the channel is initially doped lightly with p-type impurity a conducting |
| A. | depletion |
| B. | enhancemen |
| C. | both mode |
| D. | none of |
| Answer» A. depletion | |
| 177. |
If the region beneath the gate is left initially uncharged the gate field must induce a
|
| A. | depletion mode operation mos |
| B. | enhancemen t mode operation of mos |
| C. | both mode |
| D. | none of this |
| Answer» B. enhancemen t mode operation of mos | |
| 178. |
The n- channel MOS conducts when its |
| A. | gate- to- source voltage |
| B. | gate- to- source |
| C. | gate- to- source |
| D. | none of this |
| Answer» A. gate- to- source voltage | |
| 179. |
The p- channel MOS conducts when its |
| A. | gate- to- |
| B. | gate- to- |
| C. | gate- to- |
| D. | none of |
| Answer» C. gate- to- | |
| 180. |
The fan-out of a MOS-logic gate is higher than that of TTL gates because of its |
| A. | low input impedance |
| B. | high input impedance |
| C. | low output impedance |
| D. | high output impedance |
| Answer» D. high output impedance | |
| 181. |
Which factor does not affect CMOS loading? |
| A. | charging time associated |
| B. | discharging time |
| C. | output capacitance |
| D. | input capacitanc |
| Answer» C. output capacitance | |
| 182. |
Logic gates are the basic elements that make a |
| A. | analog system |
| B. | basic system |
| C. | gating system |
| D. | digital system |
| Answer» D. digital system | |
| 183. |
Which of the following gate is a two-level logic gate |
| A. | or gate |
| B. | nand gate |
| C. | exclusive or gate |
| D. | not |
| Answer» C. exclusive or gate | |
| 184. |
Among the logic families, the family which can be used at very high frequency greater than 100 MHz in a 4 bit |
| A. | ttlas |
| B. | cmos |
| C. | ecl |
| D. | ttlls |
| Answer» C. ecl | |
| 185. |
The fan Out of a 7400 NAND gate is |
| A. | 2ttl |
| B. | 5ttl |
| C. | 8ttl |
| D. | 10ttl |
| Answer» D. 10ttl | |
| 186. |
Which transistor element is used in CMOS logic? |
| A. | fet |
| B. | mosfet |
| C. | bipolar |
| D. | unijunctio n |
| Answer» B. mosfet | |
| 187. |
CMOS circuits are extensively used for ON-chip computers mainly because of their extremely |
| A. | low power dissipation. |
| B. | high noise immunity. |
| C. | large packing density. |
| D. | low cost. |
| Answer» C. large packing density. | |
| 188. |
Which equation is correct? |
| A. | vnl = vil(max) + vol(max) |
| B. | vnh = voh(min) + vih(min) |
| C. | vnl = voh(min) – vih(min) |
| D. | vnh = voh(min) – vih(min) |
| Answer» D. vnh = voh(min) – vih(min) | |
| 189. |
The greater the propagation delay, the |
| A. | lower the maximum frequency |
| B. | higher the maximum frequency |
| C. | maximum frequency is unaffected |
| D. | minimum frequency is unaffected |
| Answer» A. lower the maximum frequency | |
| 190. |
For a CMOS gate, which is the best speed-power product? |
| A. | 1.4 pj |
| B. | 1.6 pj |
| C. | 2.4 pj |
| D. | 3.3 pj |
| Answer» A. 1.4 pj | |
| 191. |
In a TTL circuit, if an excessive number of load gate inputs are connected, |
| A. | voh(min) drops below voh |
| B. | voh drops below voh(min) |
| C. | voh exceeds voh(min) |
| D. | voh and voh(min) are unaffected |
| Answer» B. voh drops below voh(min) | |
| 192. |
Which is not a MOSFET terminal? |
| A. | gate |
| B. | drain |
| C. | source |
| D. | base |
| Answer» D. base | |
| 193. |
An open-drain gate is the CMOS counterpart of |
| A. | an open- collector ttl gate |
| B. | a tristate ttl gate |
| C. | a bipolar junction transistor |
| D. | an emitter- coupled logic gate |
| Answer» A. an open- collector ttl gate | |
| 194. |
The active switching element used in all TTL circuits is the |
| A. | bipolar junction transistor (bjt |
| B. | field-effect transistor (fet |
| C. | metal-oxide semiconduct or field- effect transistor (mosfet |
| D. | unijunctio n transistor (uj) |
| Answer» A. bipolar junction transistor (bjt | |
| 195. |
One output structure of a TTL gate is often referred to as a |
| A. | diode |
| B. | jbt arrangement |
| C. | totem-pole arrangement |
| D. | base, emitter, collector arrangeme nt |
| Answer» C. totem-pole arrangement | |
| 196. |
An open-collector output requires |
| A. | a pull-down resistor |
| B. | a pull-up resistor |
| C. | no output resistor |
| D. | an output resistor |
| Answer» B. a pull-up resistor | |
| 197. |
Which is not an output state for tristate logic? |
| A. | high |
| B. | low |
| C. | high-z |
| D. | low-z |
| Answer» D. low-z | |
| 198. |
TTL is alive and well, particularly in |
| A. | industrial applications |
| B. | millitary applications |
| C. | educational applications |
| D. | commercia lapplicatio ns |
| Answer» C. educational applications | |
| 199. |
A TTL NAND gate with IIL(max) of –1.6 mA per input drives eight TTL inputs. How much current does the drive output sink? |
| A. | –12.8 ma |
| B. | –8 ma |
| C. | –1.6 ma |
| D. | –25.6 ma |
| Answer» A. –12.8 ma | |
| 200. |
A standard TTL circuit with a totem-pole output can sink, in the LOW state (IOL(max)), |
| A. | 16 ma |
| B. | 20 ma |
| C. | 24 ma |
| D. | 28ma |
| Answer» A. 16 ma | |
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