A full subtracter circuit requires ________.

Related MCQs

• Refer to the given figures (a) and (b). A logic analyzer is used to check the circuit in figure (a) and displays the waveforms shown in figure (b). The actual analyzer display shows all four data outputs, Q0-Q3. The analyzer's cursor is placed at position X and all four of the data output lines show a LOW level output. What is wrong, if anything, with the circuit?
• If the number of n selected input lines is equal to 2^m then it requires            select lines.
• A logic circuit that provides a HIGH output for both inputs HIGH or both inputs LOW is a(n):
• A logic circuit that provides a HIGH output if one input or the other input, but not both, is HIGH, is a(n):
• A binary-weighted-input digital-to-analog converter has a feedback resistor, Rf, of 12 k. If 50 A of current is through the resistor, voltage out of the circuit is ________.
• Determine the output frequency for a frequency division circuit that contains 12 flip-flops with an input clock frequency of 20.48 MHz.
• The ________ circuit overcomes the problem of switching caused by jitter on the inputs.
• Why would a delay gate be needed for a digital circuit?
• Which of the following circuit parameters would be most likely to limit the maximum operating frequency of a flip-flop?
• A                          is a circuit with only one output but can have multiple inputs.