How may standard levels of interrupts are provided on the 8-bit ISA bus (XT-class computer)?

Related MCQs

• State whether the following statements are True or False for the features of real time operating system. i) fast process or thread switch ii) ability to respond to external interrupts quickly. iii) minimization of intervals during which interrupts are enabled. iv) preemptive scheduling based on priority
• The AT bus is also known as the ____ bus.
• The system developed by IBM with ISA architecture is ______
• What is the full form of ISA?
• Which protocol standard of serial communication specify the bi-directional and half-duplex form of data transmission by allowing various numbers of drivers and receivers in bus configuration?
• Which of following is not a valid bus in computer system ?
• Which of the following can determine if two masters start to use the bus at the same time?
• What does an IC that initiate or enable the data transfer on bus can be regarded as, in accordance to the I2c protocol specifications?
• Which potential mode of operation indicate the frequent sending of byte to the slave corresponding to the reception of an acknowledge signal when it becomes desirable for the master to write to the slave during data transmission in I2C bus?
• Which common bus specification provides the fastest data transfer rate?