McqMate
These multiple-choice questions (MCQs) are designed to enhance your knowledge and understanding in the following areas: Computer Science Engineering (CSE) , Electronics and Telecommunication Engineering [ENTC] .
| 401. |
The 7447A is a BCD-to-7-segment decoder with ripple blanking input and output functions. The purpose of these lines is to . |
| A. | turn off the display for any nonsignificant digit |
| B. | turn off the display for any zero |
| C. | turn off the display for leading or trailing zeros |
| D. | test the display to assure all segments are operationa l |
| Answer» A. turn off the display for any nonsignificant digit | |
| 402. |
One reason for using the sum-of-products form is that it can be implemented using all gates without much difficulty. |
| A. | nor |
| B. | nand |
| C. | and |
| D. | door |
| Answer» B. nand | |
| 403. |
When an open occurs on the input of a CMOS gate, the output will . |
| A. | go low, because there is no current in an open circuit |
| B. | react as if the open input were a high |
| C. | go high, since full voltage appears across an open |
| D. | be unpredicta ble; it may go high or low |
| Answer» D. be unpredicta ble; it may go high or low | |
| 404. |
To subtract a signed number (the subtrahend) from another signed number (the minuend) in the 2's complement system, the minuend is . |
| A. | complemented only if it is positive |
| B. | complemente d only if it is negative |
| C. | always complemente d |
| D. | never compleme nted |
| Answer» D. never compleme nted | |
| 405. |
In an odd-parity system, the data that will produce a parity bit = 1 is . |
| A. | data = 1010011 |
| B. | data = 1111000 |
| C. | data = 1100000 |
| D. | all of the above |
| Answer» D. all of the above | |
| 406. |
The addition of two signed numbers in the 2's complement system can cause overflow. For overflow to occur both numbers must . |
| A. | be positive |
| B. | be negative |
| C. | have the same sign |
| D. | have opposite signs |
| Answer» C. have the same sign | |
| 407. |
A Karnaugh map will . |
| A. | eliminate the need for tedious boolean simplifications |
| B. | allow any circuit to be implemented with just and and or gates |
| C. | produce the simplest sum-of- products expression |
| D. | give an overall picture of how the signals flow through the logic circuit |
| Answer» A. eliminate the need for tedious boolean simplifications | |
| 408. |
An 8-bit binary number is input to an odd parity generator. The parity bit will equal 1 only if . |
| A. | the number is odd |
| B. | the number of 1s in the number is odd |
| C. | the number is even |
| D. | the number of 1s in the number is even |
| Answer» D. the number of 1s in the number is even | |
| 409. |
Two 4-bit comparators are cascaded to form an 8-bit comparator. The cascading inputs of the most significant 4 bits should be connected . |
| A. | to the outputs from the least significant 4- bit comparator |
| B. | to the cascading inputs of the least significant 4- bit comparator |
| C. | a = b to a logic high, a < b and a > b to a logic low |
| D. | ground |
| Answer» A. to the outputs from the least significant 4- bit comparator | |
| 410. |
When Karnaugh mapping, we must be sure to use the number of loops. |
| A. | maximum |
| B. | minimum |
| C. | median |
| D. | karnaugh |
| Answer» B. minimum | |
| 411. |
The final output of a POS circuit is generated by . |
| A. | an and |
| B. | an or |
| C. | a nor |
| D. | a nand |
| Answer» A. an and | |
| 412. |
After each circuit in a subsection of a VHDL program has been , they can be combined and the subsection can be tested. |
| A. | designed |
| B. | tested |
| C. | engineered |
| D. | produced |
| Answer» B. tested | |
| 413. |
The series of IC's are pin, function, and voltage-level compatible with the 74 series IC's. |
| A. | als |
| B. | cmos |
| C. | hct |
| D. | 2n |
| Answer» C. hct | |
| 414. |
The circuit produces a HIGH output whenever the two inputs are equal. |
| A. | exclusive-and |
| B. | exclusive- nand |
| C. | exclusive- nor |
| D. | exclusive- or |
| Answer» C. exclusive- nor | |
| 415. |
A 4-bit adder has the following inputs: C0 = 0, A1 = 0, A2 = 1, A3 = 0, A4 = 1, B1 = 0, B2 = 1, B3 = 1, B4 = 1. The output will be . |
| A. | 1100 |
| B. | 10101 |
| C. | 11000 |
| D. | 11 |
| Answer» C. 11000 | |
| 416. |
The statement evaluates the variable status. |
| A. | if/then |
| B. | if/then/el se |
| C. | case |
| D. | elsif |
| Answer» A. if/then | |
| 417. |
In VHDL, data can be each of the following types except . |
| A. | bit |
| B. | bit_vector |
| C. | std_logic |
| D. | std_vect or |
| Answer» D. std_vect or | |
| 418. |
When grouping cells within a K-map, the cells must be combined in groups of . |
| A. | 2\s |
| B. | 1, 2, 4, 8, etc. |
| C. | 4\s |
| D. | 3\s |
| Answer» B. 1, 2, 4, 8, etc. | |
| 419. |
The circuit produces a HIGH output whenever the two inputs are unequal. |
| A. | exclusive-and |
| B. | exclusive- nor |
| C. | exclusive-or |
| D. | inexclusive -or |
| Answer» C. exclusive-or | |
| 420. |
Occasionally, a particular logic expression will be of no consequence in the operation of a circuit, such as in a BCD-to-decimal converter. These result in terms in the K-map and can be treated as either or , in order to the resulting term. |
| A. | don\t care, 1\s, 0\s, simplify |
| B. | spurious, and\s, or\s, eliminate |
| C. | duplicate, 1\s, 0\s, verify |
| D. | spurious, 1\s, 0\s, simplify |
| Answer» A. don\t care, 1\s, 0\s, simplify | |
| 421. |
A good rule of thumb for determining the pin numbers of dual-in-line package IC chips would be to place the notch to your right and pin #1 will always be in the lower right corner. |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» B. false | |
| 422. |
The carry output of each adder in a ripple adder provides an additional sum output bit. |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» A. true | |
| 423. |
Truth tables are great for listing all possible combinations of independent variables. |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» A. true | |
| 424. |
A square in the top row of a K-map is considered to be adjacent to its corresponding square in the bottom row. |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» A. true | |
| 425. |
To implement the full-adder sum functions, two exclusive-OR gates can be used. |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» A. true | |
| 426. |
The input at the 1, 2, 4, 8 inputs to a 4-line to 16-line decoder with active- low outputs is 1110. As a result, output line 7 is driven LOW. |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» B. false | |
| 427. |
When decisions demand two possible actions, the IF/THEN/ELSE control structure is used. |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» A. true | |
| 428. |
TTL stands for transistor-technology-logic. |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» B. false | |
| 429. |
The 54 prefix on ICs indicates a broader operating temperature range, generally intended for military use. |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» A. true | |
| 430. |
This is an example of a POS expression: |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» A. true | |
| 431. |
The abbreviation for an exclusive-OR gate is XOR. |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» A. true | |
| 432. |
In an even-parity system, the parity bit is adjusted to make an even number of one bits. |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» A. true | |
| 433. |
In an even-parity system, the following data will produce a parity bit = 1. data = 1010011 |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» B. false | |
| 434. |
The following combination is correct for an ODD parity data transmission system: data = 011011100 and parity = 0 |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» A. true | |
| 435. |
The XOR gate will produce a HIGH output if only one but not both of the inputs is HIGH. |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» A. true | |
| 436. |
When decisions demand one of many possible actions, the ELSIF control structure is used. |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» A. true | |
| 437. |
The K-map provides a "graphical" approach to simplifying sum-of- products expressions. |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» A. true | |
| 438. |
Even parity is the condition of having an even number of 1s in every group of bits. |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» A. true | |
| 439. |
The look-ahead carry method suffers from propagation delays. |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» B. false | |
| 440. |
A pull-up resistor is a resistor used to keep a given point in a circuit HIGH when in the active state. |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» A. true | |
| 441. |
A data selector is also called a demultiplexer. |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» B. false | |
| 442. |
A digital circuit that converts coded information into a familiar or non- coded form is known as an encoder. |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» B. false | |
| 443. |
An exclusive-OR gate will invert a signal on one input if the other is always HIGH. |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» A. true | |
| 444. |
The following combination is correct for an EVEN parity data transmission system: data = 100111100 and parity = 0 |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» B. false | |
| 445. |
The CASE control structure is used when an expression has a list of possible values. |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» A. true | |
| 446. |
An encoder in which the highest and lowest value input digits are encoded simultaneously is known as a priority encoder. |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» B. false | |
| 447. |
Three select lines are required to address four data input lines. |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» B. false | |
| 448. |
Single looping in groups of three is a common K-map simplification technique. |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» B. false | |
| 449. |
In true sum-of-products expressions, the inversion signs cannot cover more than single variables in a term. |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» A. true | |
| 450. |
A combinatorial logic circuit has memory characteristics that "remember" the inputs after they have been removed. |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» B. false | |
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