The data bus buffer is _________data line

Related MCQs

• The peak bus bandwidth of backside bus (cache bus) is ______ Mbytes/second
• The ___ bus controller device decodes the signals to produce the control bus signal
• The remaining address line of ______ bus is decoded to generate chip select signal
• The _____ are connected to 2 address bus line in system
• The pins are _______ data lines and are connected to data bus in system
• The pin of minimum mode AD0- AD15 has _________ data bus
• The address bus enables the ________ for data transfer.
• The 80386DX has both 32 bit internal registers ______ external data bus
• The address / data bus in 8085 is __________.
• The device such as buffer and batches are used as ____________