expressions can be implemented using either (1) 2-level AND- OR logic circuits or (2) 2-level NAND logic circuits.

Related MCQs

• Product-of-Sums expressions can be implemented using                        
• Logic circuits can also be designed using
• The circuits of NOR based S-R latch classified as asynchronous sequential circuits, why?
• The inverter can be produced with how many NAND gates?
• Latches constructed with NOR and NAND gates tend to remain in the latched condition due to which configuration feature?
• The full subtractor can be implemented using                        
• The expression of a NAND gate is               
• The NAND latch works when both inputs are                        
• The logic circuits whose outputs at any instant of time depends only on the present input but also on the past outputs are called
• Logic circuits that are designated as buffers, drivers or buffers/drivers are designed to have: