McqMate
| 1. |
The minimum number of transistors required to implement a two input AND gate is |
| A. | 2 |
| B. | 4 |
| C. | 6 |
| D. | 8 |
| Answer» C. 6 | |
| 2. |
Using DeMorgan’s Theorem we can convert any AND-OR structure into |
| A. | NAND-NAND |
| B. | OR-NAND |
| C. | NAND-NOR |
| D. | NOR-NAND |
| Answer» A. NAND-NAND | |
| 3. |
For a memory with a 16-bit address space, the addressability is |
| A. | 16 bits |
| B. | 8 bits |
| C. | 2^16 bits |
| D. | Cannot be determined |
| Answer» D. Cannot be determined | |
| 4. |
Because we wish to allow each ASCII code to occupy one location in memory, most memories are _____ addressable. |
| A. | BYTE |
| B. | NIBBLE |
| C. | WORD (16 bits) |
| D. | DOUBLEWORD (32 bits) |
| Answer» A. BYTE | |
| 5. |
Circuit A is a 1-bit adder; circuit B is a 1 bit multiplier. (Hint: Construct the truth table for the adder and the multiplier) |
| A. | Circuit A has more gates than circuit B |
| B. | Circuit B has more gates than circuit A |
| C. | Circuit A has the same number of gates as circuit B |
| D. | none |
| Answer» A. Circuit A has more gates than circuit B | |
| 6. |
When the write enable input is not asserted, the gated D latch ______ its output. |
| A. | can not change |
| B. | clears |
| C. | sets |
| D. | complements |
| Answer» A. can not change | |
| 7. |
A structure that stores a number of bits taken “together as a unit” is a |
| A. | gate |
| B. | mux |
| C. | decoder |
| D. | register |
| Answer» D. register | |
| 8. |
We say that a set of gates is logically complete if we can build any circuit without using any other kind of gates. Which of the following sets are logically complete |
| A. | set of {AND,OR} |
| B. | set of {EXOR, NOT} |
| C. | set of {AND,OR,NOT} |
| D. | None of the above |
| Answer» C. set of {AND,OR,NOT} | |
| 9. |
Of the following circuits, the one which involves storage is |
| A. | RS Latch |
| B. | mux |
| C. | nand |
| D. | decoder |
| Answer» A. RS Latch | |
| 10. |
If m is a power of 2, the number of select lines required for an m-input mux is: |
| A. | m |
| B. | 2^m |
| C. | log2 (m) |
| D. | 2*m |
| Answer» C. log2 (m) | |
| 11. |
For the number A[15:0] = 0110110010001111, A[14:13] is ______ A[3:2]. |
| A. | less than |
| B. | greater than |
| C. | the same as |
| D. | cannot be determined |
| Answer» C. the same as | |
| 12. |
Which of the following conditions is not allowed in an RS latch? |
| A. | R is asserted, S is asserted |
| B. | R is asserted, S is negated |
| C. | R is negated, S is asserted |
| D. | R is negated, S is negated |
| Answer» A. R is asserted, S is asserted | |
| 13. |
Which of the following pair of gates can form a latch? |
| A. | a pair of cross coupled OR |
| B. | a pair of cross copled AND |
| C. | a pair of cross coupled NAND |
| D. | a cross coupled NAND/OR |
| Answer» C. a pair of cross coupled NAND | |
| 14. |
‘Burst refresh’ in DRAM is also called |
| A. | Concentrated refresh |
| B. | Distributed refresh |
| C. | Hidden refresh |
| D. | None of the above |
| Answer» A. Concentrated refresh | |
| 15. |
The number of interrupt lines in 8085 is |
| A. | 2 |
| B. | 3 |
| C. | 4 |
| D. | 5 |
| Answer» D. 5 | |
| 16. |
A real number consists of |
| A. | integer part |
| B. | integer part and fraction part |
| C. | integer part, fraction part along with positive or negative sign |
| D. | none of the above |
| Answer» C. integer part, fraction part along with positive or negative sign | |
| 17. |
Assertion (A): Negative values of incremental operator in DO loop are allowed in Fortran 77 but not in earlier versions of Fortran. Reason (R): Fortran 77 has better array facilities than earlier versions of Fortran. |
| A. | Both A and R are correct and R is correct explanation of A |
| B. | Both A and R are correct but R is not correct explanation of A |
| C. | A is correct R is wrong |
| D. | A is wrong R is correct |
| Answer» B. Both A and R are correct but R is not correct explanation of A | |
| 18. |
Which of the following is not treated as hexadecimal constant by assembler in 8085? |
| A. | 45 H |
| B. | 6 AFH |
| C. | 234 |
| D. | 64 H |
| Answer» C. 234 | |
| 19. |
IC 7485 cannot be cascadeD. |
| A. | True |
| B. | False |
| C. | none |
| D. | none |
| Answer» B. False | |
| 20. |
An I/O processor controls the flow of information between |
| A. | cache memory and I/O devices |
| B. | main memory and I/O devices |
| C. | two I/O devices |
| D. | cache and main memory |
| Answer» B. main memory and I/O devices | |
| 21. |
MS Access is a DBMS software. |
| A. | True |
| B. | False |
| C. | none |
| D. | none |
| Answer» A. True | |
| 22. |
When .9432 E – 4 is subtracted from .5452 E – 3 in normalized floating point mode |
| A. | none of the numbers is changed |
| B. | .9432 E – 4 is changed to .09432 E – 3 and .5452 E – 3 is not changed |
| C. | .5452 E – 3 is changed to 5.452 E – 4 but .9432 E – 4 is not changed |
| D. | both Ihe numbers are changed and their exponents are, made equal to -5 |
| Answer» B. .9432 E – 4 is changed to .09432 E – 3 and .5452 E – 3 is not changed | |
| 23. |
DS directive in 8085 |
| A. | forces the assembler to reserve one byte of memory |
| B. | forces the assembler to reserve a specified number of bytes in the memory |
| C. | forces the assembler to reserve a specified number of consecutive bytes in the memory |
| D. | none of the above |
| Answer» C. forces the assembler to reserve a specified number of consecutive bytes in the memory | |
| 24. |
Which of the following is a valid integer constant? |
| A. | 127 |
| B. | 127.0 |
| C. | 127 |
| D. | 125 + 3 |
| Answer» A. 127 | |
| 25. |
The five flags in 8085 are designated as |
| A. | Z, CY, S, P and AC |
| B. | D, Z, S, P, AC |
| C. | Z, C, S, P, AC |
| D. | Z, CY, S, D, AC |
| Answer» A. Z, CY, S, P and AC | |
| 26. |
In 8085 which addressing mode is also called inherent addressing? |
| A. | Direct |
| B. | Register |
| C. | Implicit |
| D. | Immediate |
| Answer» C. Implicit | |
| 27. |
It is possible to copy a file in the same directory. |
| A. | True |
| B. | False |
| C. | none |
| D. | none |
| Answer» A. True | |
| 28. |
In a computer the data transfer between hard disk and CPU is nearly the same as that between diskette and CPU. |
| A. | True |
| B. | False |
| C. | none |
| D. | none |
| Answer» B. False | |
| 29. |
The timing difference between a slow memory and fast processor can be resolved if |
| A. | processor is capable of waiting |
| B. | external buffer is used |
| C. | either (a) or (b) |
| D. | neither (a) nor (b) |
| Answer» C. either (a) or (b) | |
| 30. |
In 8086 the number of bytes which can be addressed directly is about |
| A. | 1000 |
| B. | 10000 |
| C. | 100000 |
| D. | one million |
| Answer» D. one million | |
| 31. |
In Fortran 77 a variable name can contain special characters. |
| A. | True |
| B. | False |
| C. | none |
| D. | none |
| Answer» B. False | |
| 32. |
Which of the following is not a general purpose peripheral? |
| A. | I/O port |
| B. | Programmable interrupt controller |
| C. | Programmable CRT controller |
| D. | Programmable interval timer |
| Answer» C. Programmable CRT controller | |
| 33. |
In one’s complement 8 bit representation 11111111 represents |
| A. | +0 |
| B. | -0 |
| C. | +1 |
| D. | -1 |
| Answer» B. -0 | |
| 34. |
The operating modes of 8255 A are called |
| A. | mode 0 and mode 1 |
| B. | mode 0, mode 1 and mode 2 |
| C. | mode 0 and mode 2 |
| D. | mode 0, mode 2 and mode 3 |
| Answer» B. mode 0, mode 1 and mode 2 | |
| 35. |
Which of the following is type declaration statement in C? |
| A. | int bar |
| B. | s = s + 1 |
| C. | king = horse + 1 |
| D. | prin = prin * prin |
| Answer» A. int bar | |
| 36. |
Internet is a worldwide network of computers where most of the information is freely available. |
| A. | True |
| B. | False |
| C. | none |
| D. | none |
| Answer» A. True | |
| 37. |
A 37 bit mantissa has an accuracy of |
| A. | 6 decimal places |
| B. | 8 decimal places |
| C. | 10 decimal places |
| D. | 11 decimal places |
| Answer» D. 11 decimal places | |
| 38. |
In a C expression using assignment operators, relational operators and arithmetic operators, the hierarchy of operations (in the absence of parenthesis) is |
| A. | assignment, relational, arithmetic |
| B. | relational, assignment, arithmetic |
| C. | arithmetic, assignment, relational |
| D. | arithmetic, relational, assignment |
| Answer» D. arithmetic, relational, assignment | |
| 39. |
In 8085, the pins for SID and SOD are |
| A. | 4 and 5 respectively |
| B. | 5 and 4 respectively |
| C. | 3 and 4 respectively |
| D. | 4 and 3 respectively |
| Answer» B. 5 and 4 respectively | |
| 40. |
Assertion (A): Each memory chip has its own address latch. Reason (R): ALE signal comes out of microprocessor 8085 and goes to memory chip. |
| A. | Both A and R are correct and R is correct explanation of A |
| B. | Both A and R are correct but R is not correct explanation of A |
| C. | A is correct R is wrong |
| D. | A is wrong R is correct |
| Answer» D. A is wrong R is correct | |
| 41. |
An e-mail message can be sent to many recipients. |
| A. | True |
| B. | False |
| C. | none |
| D. | none |
| Answer» A. True | |
| 42. |
In C the keywords are also called |
| A. | special words |
| B. | reserved words |
| C. | class words |
| D. | character words |
| Answer» B. reserved words | |
| 43. |
The character set of Fortran 77 includes lower case alphabets a to z. |
| A. | True |
| B. | False |
| C. | none |
| D. | none |
| Answer» B. False | |
| 44. |
Which memory has read operation, byte erase, byte write and chip erase? |
| A. | RAM |
| B. | UVEPROM |
| C. | EEPROM |
| D. | both (b) and (c) |
| Answer» C. EEPROM | |
| 45. |
The forms of IF statements in FORTRAN 77 are called |
| A. | logical IF and Block IF |
| B. | logical IF, block IF and arithmetic IF |
| C. | logic IF, block IF, arithmetic IF and negate IF |
| D. | logical IF and arithmetic IF |
| Answer» B. logical IF, block IF and arithmetic IF | |
| 46. |
In 8085 |
| A. | P flag is set when the result has even parity |
| B. | P flag is set when the result has odd parity |
| C. | P flag is reset when the result has odd parity |
| D. | P flag is reset when the result has even parity |
| Answer» A. P flag is set when the result has even parity | |
| 47. |
If the sign bit of mantissa is 0 and the exponent is increased from a positive to a more negative number the result is |
| A. | a larger floating point number |
| B. | a smaller floating point number |
| C. | either (a) or (b) depending on the actual number |
| D. | a negative floating point number |
| Answer» A. a larger floating point number | |
| 48. |
A microprocessor is a chip integrating all the functions of a CPU of a computer. |
| A. | multiple |
| B. | single |
| C. | double |
| D. | triple |
| Answer» B. single | |
| 49. |
Microprocessor is a/an circuit that functions as the CPU of the compute |
| A. | electronic |
| B. | mechanic |
| C. | integrating |
| D. | processing |
| Answer» A. electronic | |
| 50. |
Microprocessor is the of the computer and it perform all the computational tasks |
| A. | main |
| B. | heart |
| C. | important |
| D. | simple |
| Answer» B. heart | |
| 51. |
The purpose of the microprocessor is to control |
| A. | memory |
| B. | switches |
| C. | processing |
| D. | tasks |
| Answer» A. memory | |
| 52. |
The first digital electronic computer was built in the year |
| A. | 1950 |
| B. | 1960 |
| C. | 1940 |
| D. | 1930 |
| Answer» C. 1940 | |
| 53. |
In 1960's texas institute invented |
| A. | integrated circuits |
| B. | microprocessor |
| C. | vacuum tubes |
| D. | transistors |
| Answer» A. integrated circuits | |
| 54. |
The intel 8086 microprocessor is a processor |
| A. | 8 bit |
| B. | 16 bit |
| C. | 32 bit |
| D. | 4 bit |
| Answer» B. 16 bit | |
| 55. |
The microprocessor can read/write 16 bit data from or to |
| A. | memory |
| B. | I /O device |
| C. | processor |
| D. | register |
| Answer» A. memory | |
| 56. |
In 8086 microprocessor , the address bus is bit wide |
| A. | 12 bit |
| B. | 10 bit |
| C. | 16 bit |
| D. | 20 bit |
| Answer» D. 20 bit | |
| 57. |
The work of EU is |
| A. | encoding |
| B. | decoding |
| C. | processing |
| D. | calculations |
| Answer» B. decoding | |
| 58. |
The 16 bit flag of 8086 microprocessor is responsible to indicate |
| A. | the condition of result of ALU operation |
| B. | the condition of memory |
| C. | the result of addition |
| D. | the result of subtraction |
| Answer» A. the condition of result of ALU operation | |
| 59. |
The CF is known as |
| A. | carry flag |
| B. | condition flag |
| C. | common flag |
| D. | single flag |
| Answer» A. carry flag | |
| 60. |
The SF is called as |
| A. | service flag |
| B. | sign flag |
| C. | single flag |
| D. | condition flag |
| Answer» B. sign flag | |
| 61. |
The OF is called as |
| A. | overflow flag |
| B. | overdue flag |
| C. | one flag |
| D. | over flag |
| Answer» A. overflow flag | |
| 62. |
The IF is called as |
| A. | initial flag |
| B. | indicate flag |
| C. | interrupt flag |
| D. | inter flag |
| Answer» C. interrupt flag | |
| 63. |
The register AX is formed by grouping |
| A. | AH & AL |
| B. | BH & BL |
| C. | CH & CL |
| D. | DH & DL |
| Answer» A. AH & AL | |
| 64. |
The SP is indicated by |
| A. | single pointer |
| B. | stack pointer |
| C. | source pointer |
| D. | destination pointer |
| Answer» B. stack pointer | |
| 65. |
The BP is indicated by |
| A. | base pointer |
| B. | binary pointer |
| C. | bit pointer |
| D. | digital pointer |
| Answer» A. base pointer | |
| 66. |
The SS is called as |
| A. | single stack |
| B. | stack segment |
| C. | sequence stack . |
| D. | random stack |
| Answer» B. stack segment | |
| 67. |
The index register are used to hold |
| A. | memory register |
| B. | offset address |
| C. | segment memory |
| D. | offset memory |
| Answer» A. memory register | |
| 68. |
The BIU contains FIFO register of size bytes |
| A. | 8 |
| B. | 6 |
| C. | 4 |
| D. | 12 |
| Answer» B. 6 | |
| 69. |
The BIU prefetches the instruction from memory and store them in |
| A. | queue |
| B. | register |
| C. | memory |
| D. | stack |
| Answer» A. queue | |
| 70. |
The 1 MB byte of memory can be divided into segment |
| A. | 1 Kbyte |
| B. | 64 Kbyte |
| C. | 33 Kbyte |
| D. | 34 Kbyte |
| Answer» B. 64 Kbyte | |
| 71. |
The DS is called as |
| A. | data segment |
| B. | digital segment |
| C. | divide segment |
| D. | decode segment |
| Answer» A. data segment | |
| 72. |
The CS register stores instruction in code segment |
| A. | stream |
| B. | path |
| C. | codes |
| D. | stream line |
| Answer» C. codes | |
| 73. |
The IP is bits in length |
| A. | 8 bits |
| B. | 4 bits |
| C. | 16 bits |
| D. | 32 bits |
| Answer» C. 16 bits | |
| 74. |
The push source copies a word from source to |
| A. | stack |
| B. | memory |
| C. | register |
| D. | destination |
| Answer» A. stack | |
| 75. |
LDs copies to consecutive words from memory to register and |
| A. | ES |
| B. | DS |
| C. | SS |
| D. | CS |
| Answer» B. DS | |
| 76. |
IMUL source is a signed |
| A. | multiplication |
| B. | addition |
| C. | subtraction |
| D. | division |
| Answer» A. multiplication | |
| 77. |
destination inverts each bit of destination |
| A. | NOT |
| B. | NOR |
| C. | AND |
| D. | OR |
| Answer» A. NOT | |
| 78. |
The JS is called as |
| A. | jump the signed bit |
| B. | jump single bit |
| C. | jump simple bit |
| D. | jump signal it |
| Answer» A. jump the signed bit | |
| 79. |
Instruction providing both segment base and offset address are called |
| A. | below type . |
| B. | far type |
| C. | low type |
| D. | high type |
| Answer» B. far type | |
| 80. |
The conditional branch instruction specify for branching |
| A. | conditions |
| B. | instruction |
| C. | address |
| D. | memory |
| Answer» A. conditions | |
| 81. |
The microprocessor determines whether the specified condition exists or not by testing the |
| A. | carry flag |
| B. | conditional flag |
| C. | common flag |
| D. | sign flag |
| Answer» B. conditional flag | |
| 82. |
The LES copies to words from memory to register and |
| A. | DS |
| B. | CS |
| C. | ES |
| D. | DS |
| Answer» C. ES | |
| 83. |
The translates a byte from one code to another code |
| A. | XLAT |
| B. | XCHNG |
| C. | POP |
| D. | PUSH |
| Answer» A. XLAT | |
| 84. |
The contains an offset instead of actual address |
| A. | SP |
| B. | IP |
| C. | ES |
| D. | SS |
| Answer» B. IP | |
| 85. |
The 8086 fetches instruction one after another from of memory |
| A. | code segment |
| B. | IP |
| C. | ES |
| D. | SS |
| Answer» A. code segment | |
| 86. |
The BIU contains FIFO register of size 6 bytes called . |
| A. | queue |
| B. | stack |
| C. | segment |
| D. | register |
| Answer» A. queue | |
| 87. |
The is required to synchronize the internal operands in the processor CLK Signal |
| A. | UR Signal |
| B. | Vcc |
| C. | AIE |
| D. | Ground |
| Answer» A. UR Signal | |
| 88. |
The pin of minimum mode AD0-AD15 has address |
| A. | 16 bit |
| B. | 20 bit |
| C. | 32 bit |
| D. | 4 bit |
| Answer» B. 20 bit | |
| 89. |
The pin of minimum mode AD0- AD15 has _ data bus |
| A. | 4 bit |
| B. | 20 bit |
| C. | 16 bit |
| D. | 32 bit |
| Answer» C. 16 bit | |
| 90. |
is used to write into memory |
| A. | RD |
| B. | WR |
| C. | RD / WR |
| D. | CLK |
| Answer» B. WR | |
| 91. |
The functions of Pins from 24 to 31 depend on the mode in which is operating |
| A. | 8085 |
| B. | 8086 |
| C. | 80835 |
| D. | 80845 |
| Answer» B. 8086 | |
| 92. |
The RD, WR, M/IO is the heart of control for a mode |
| A. | minimum |
| B. | maximum |
| C. | compatibility mode |
| D. | control mode |
| Answer» A. minimum | |
| 93. |
In a minimum mode there is a on the system bus |
| A. | single |
| B. | double |
| C. | multiple |
| D. | triple |
| Answer» A. single | |
| 94. |
If MN/MX is low the 8086 operates in mode |
| A. | Minimum |
| B. | Maximum |
| C. | both (A) and (B) |
| D. | medium |
| Answer» B. Maximum | |
| 95. |
In max mode, control bus signal So,S1 and S2 are sent out in form |
| A. | decoded |
| B. | encoded |
| C. | shared |
| D. | unshared |
| Answer» B. encoded | |
| 96. |
The bus controller device decodes the signals to produce the control bus signal |
| A. | internal |
| B. | data |
| C. | external |
| D. | address |
| Answer» C. external | |
| 97. |
A Instruction at the end of interrupt service program takes the execution back to the interrupted program |
| A. | forward |
| B. | return |
| C. | data |
| D. | line |
| Answer» B. return | |
| 98. |
The main concerns of the are to define a flexible set of commands |
| A. | memory interface |
| B. | peripheral interface |
| C. | both (A) and (B) |
| D. | control interface |
| Answer» A. memory interface | |
| 99. |
Primary function of memory interfacing is that the should be able to read from and write into register |
| A. | multiprocessor |
| B. | microprocessor |
| C. | dual Processor |
| D. | coprocessor |
| Answer» B. microprocessor | |
| 100. |
To perform any operations, the Mp should identify the |
| A. | register |
| B. | memory |
| C. | interface |
| D. | system |
| Answer» A. register | |
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