McqMate
Sign In
Hamberger menu
McqMate
Sign in
Sign up
Home
Forum
Search
Ask a Question
Sign In
McqMate Copyright © 2026
→
Computer Science Engineering (CSE)
→
Digital Logic Circuits (DLC)
→
In D flip-flop, if clock input is HIGH &...
Q.
In D flip-flop, if clock input is HIGH & D=1, then output is
A.
0
B.
1
C.
forbidden
D.
toggle
Answer» A. 0
6k
0
Do you find this helpful?
30
View all MCQs in
Digital Logic Circuits (DLC)
Discussion
No comments yet
Login to comment
Related MCQs
Input clock of RS flip-flop is given to
At the end of the clock pulse the value of output Q is uncertain. The situation is referred to as?
Let the input of a subtractor is A and B then what the output will be if A = B?
Let A and B is the input of a subtractor then the output will be
In serial input serial output register, the data of is accessed by the circuit.
Hold time is the time needed for the data to after the edge of the clock is triggered.
After two clock pulses, the register contains
After three clock pulses, the register contains
What will be the 4-bit pattern after the second clock pulse? (Right-most bit first)
In counter universal clock is not used.