McqMate
These multiple-choice questions (MCQs) are designed to enhance your knowledge and understanding in the following areas: Computer Science Engineering (CSE) .
| 1. |
Any signed negative binary number is recognised by its |
| A. | msb |
| B. | lsb |
| C. | byte |
| D. | nibble |
| Answer» A. msb | |
| 2. |
The parameter through which 16 distinct values can be represented is known as |
| A. | bit |
| B. | byte |
| C. | word |
| D. | nibble |
| Answer» C. word | |
| 3. |
The representation of octal number (532.2)8 in decimal is |
| A. | (346.25)10 |
| B. | (532.864)10 |
| C. | (340.67)10 |
| D. | (531.668)10 |
| Answer» A. (346.25)10 | |
| 4. |
The decimal equivalent of the binary number (1011.011)2 is |
| A. | (11.375)10 |
| B. | (10.123)10 |
| C. | (11.175)10 |
| D. | (9.23)10 |
| Answer» A. (11.375)10 | |
| 5. |
An important drawback of binary system is |
| A. | it requires very large string of 1’s and 0’s to represent a decimal number |
| B. | it requires sparingly small string of 1’s and 0’s to represent a decimal number |
| C. | it requires large string of 1’s and small string of 0’s to represent a decimal number |
| D. | it requires small string of 1’s and large string of 0’s to represent a decimal number |
| Answer» A. it requires very large string of 1’s and 0’s to represent a decimal number | |
| 6. |
The decimal equivalent of the octal number (645)8 is |
| A. | (450)10 |
| B. | (451)10 |
| C. | (421)10 |
| D. | (501)10 |
| Answer» C. (421)10 | |
| 7. |
The largest two digit hexadecimal number is |
| A. | (fe)16 |
| B. | (fd)16 |
| C. | (ff)16 |
| D. | (ef)16 |
| Answer» C. (ff)16 | |
| 8. |
Representation of hexadecimal number (6DE)H in decimal: |
| A. | 6 * 162 + 13 * 161 + 14 * 160 |
| B. | 6 * 162 + 12 * 161 + 13 * 160 |
| C. | 6 * 162 + 11 * 161 + 14 * 160 |
| D. | 6 * 162 + 14 * 161 + 15 * 160 |
| Answer» A. 6 * 162 + 13 * 161 + 14 * 160 | |
| 9. |
The quantity of double word is |
| A. | 16 bits |
| B. | 32 bits |
| C. | 4 bits |
| D. | 8 bits |
| Answer» B. 32 bits | |
| 10. |
What does RTL in digital circuit design stand for? |
| A. | register transfer language |
| B. | register transfer logic |
| C. | register transfer level |
| D. | resistor-transistor logic |
| Answer» C. register transfer level | |
| 11. |
RTL is a design abstraction of what kind of circuit? |
| A. | asynchronous digital circuit |
| B. | synchronous digital circuit |
| C. | asynchronous sequential circuit |
| D. | analog circuit |
| Answer» B. synchronous digital circuit | |
| 12. |
RTL is used in HDL to create what level of representations in the circuit? |
| A. | high-level |
| B. | low-level |
| C. | mid-level |
| D. | same level |
| Answer» A. high-level | |
| 13. |
RTL mainly focuses on describing the flow of signals between |
| A. | logic gates |
| B. | registers |
| C. | clock |
| D. | inverter |
| Answer» B. registers | |
| 14. |
Which flip-flop is usually used in the implementation of the registers? |
| A. | d flip-flop |
| B. | s-r flip-flop |
| C. | t flip-flop |
| D. | j-k flip-flop |
| Answer» A. d flip-flop | |
| 15. |
Which of the following tool performs logic optimization? |
| A. | simulation tool |
| B. | synthesis tool |
| C. | routing tool |
| D. | rtl compiler |
| Answer» B. synthesis tool | |
| 16. |
Hold time is the time needed for the data to after the edge of the clock is triggered. |
| A. | decrease |
| B. | increase |
| C. | remain constant |
| D. | negate |
| Answer» C. remain constant | |
| 17. |
Simulator enters in which phase after the initialization phase? |
| A. | execution phase |
| B. | compilation phase |
| C. | elaboration phase |
| D. | simulation phase |
| Answer» A. execution phase | |
| 18. |
All input of NOR as low produces result as |
| A. | low |
| B. | mid |
| C. | high |
| D. | floating |
| Answer» C. high | |
| 19. |
In RTL NOR gate, the output is at logic 1 only when all the inputs are at |
| A. | logic 0 |
| B. | logic 1 |
| C. | +10v |
| D. | floating |
| Answer» A. logic 0 | |
| 20. |
The role of the is to convert the collector current into a voltage in RTL. |
| A. | collector resistor |
| B. | base resistor |
| C. | capacitor |
| D. | inductor |
| Answer» A. collector resistor | |
| 21. |
The limitations of the one transistor RTL NOR gate are overcome by |
| A. | two-transistor rtl implementation |
| B. | three-transistor rtl implementation |
| C. | multi-transistor rtl implementation |
| D. | four-transistor rtl implementation |
| Answer» C. multi-transistor rtl implementation | |
| 22. |
The primary advantage of RTL technology was that |
| A. | it results as low power dissipation |
| B. | it uses a minimum number of resistors |
| C. | it uses a minimum number of transistors |
| D. | it operates swiftly |
| Answer» C. it uses a minimum number of transistors | |
| 23. |
The disadvantage of RTL is that |
| A. | it uses a maximum number of resistors |
| B. | it results in high power dissipation |
| C. | high noise creation |
| D. | it uses minimum number of transistors |
| Answer» B. it results in high power dissipation | |
| 24. |
TTL circuits with “totem-pole” output stage minimize |
| A. | the power dissipation in rtl |
| B. | the time consumption in rtl |
| C. | the speed of transferring rate in rtl |
| D. | propagation delay in rtl |
| Answer» A. the power dissipation in rtl | |
| 25. |
The minimum number of transistors can be used by 2 input AND gate is |
| A. | 2 |
| B. | 3 |
| C. | 4 |
| D. | 5 |
| Answer» A. 2 | |
| 26. |
Diode–transistor logic (DTL) is the direct ancestor of |
| A. | register-transistor logic |
| B. | transistor–transistor logic |
| C. | high threshold logic |
| D. | emitter coupled logic |
| Answer» B. transistor–transistor logic | |
| 27. |
In DTL logic gating function is performed by |
| A. | diode |
| B. | transistor |
| C. | inductor |
| D. | capacitor |
| Answer» A. diode | |
| 28. |
In DTL amplifying function is performed by |
| A. | diode |
| B. | transistor |
| C. | inductor |
| D. | capacitor |
| Answer» B. transistor | |
| 29. |
How many stages a DTL consist of? |
| A. | 2 |
| B. | 3 |
| C. | 4 |
| D. | 5 |
| Answer» B. 3 | |
| 30. |
The full form of CTDL is |
| A. | complemented transistor diode logic |
| B. | complemented transistor direct logic |
| C. | complementary transistor diode logic |
| D. | complementary transistor direct logic |
| Answer» A. complemented transistor diode logic | |
| 31. |
The DTL propagation delay is relatively |
| A. | large |
| B. | small |
| C. | moderate |
| D. | negligible |
| Answer» A. large | |
| 32. |
The way to speed up DTL is to add an across intermediate resister is |
| A. | small “speed-up” capacitor |
| B. | large “speed-up” capacitor |
| C. | small “speed-up” transistor |
| D. | large ” speed-up” transistor |
| Answer» A. small “speed-up” capacitor | |
| 33. |
The process to avoid saturating the switching transistor is performed by |
| A. | baker clamp |
| B. | james r. biard |
| C. | chris brown |
| D. | totem-pole |
| Answer» A. baker clamp | |
| 34. |
A major advantage of DTL over the earlier resistor–transistor logic is the |
| A. | increased fan out |
| B. | increased fan in |
| C. | decreased fan out |
| D. | decreased fan in |
| Answer» B. increased fan in | |
| 35. |
To increase fan-out of the gate in DTL |
| A. | an additional capacitor may be used |
| B. | an additional resister may be used |
| C. | an additional transistor and diode may be used |
| D. | only an additional diode may be used |
| Answer» C. an additional transistor and diode may be used | |
| 36. |
A disadvantage of DTL is |
| A. | the input transistor to the resister |
| B. | the input resister to the transistor |
| C. | the increased fan-in |
| D. | the increased fan-out |
| Answer» B. the input resister to the transistor | |
| 37. |
Compatibility refers to |
| A. | the output of a circuit should match with the input of another circuit |
| B. | the output of a circuit should match with the input of the same circuit |
| C. | the input of a circuit should match with the output of another circuit |
| D. | the input of a circuit should match with the output of same circuit |
| Answer» A. the output of a circuit should match with the input of another circuit | |
| 38. |
The method of connecting a driving device to a loading device is known as |
| A. | compatibility |
| B. | interface |
| C. | sourcing |
| D. | sinking |
| Answer» B. interface | |
| 39. |
The first CML logic was introduced by General Electric in |
| A. | 1960 |
| B. | 1981 |
| C. | 1961 |
| D. | 1990 |
| Answer» C. 1961 | |
| 40. |
Schottky families prevent the saturating using |
| A. | transistors |
| B. | schottky transistors |
| C. | diodes |
| D. | schottky diodes |
| Answer» D. schottky diodes | |
| 41. |
The basic idea of basic CML circuit came from an |
| A. | inverter |
| B. | buffer |
| C. | transistor |
| D. | both inverter and buffer |
| Answer» D. both inverter and buffer | |
| 42. |
The full form of MECL is |
| A. | mono emitter coupled logic |
| B. | motorola emitter coupled logic |
| C. | motorola emitter capacitor logic |
| D. | both mono emitter and motorola coupled logic |
| Answer» B. motorola emitter coupled logic | |
| 43. |
Motorola has offered MECL circuits in logic families. |
| A. | 3 |
| B. | 4 |
| C. | 5 |
| D. | 6 |
| Answer» C. 5 | |
| 44. |
The latest entrant to the ECL family is |
| A. | ecl 10k |
| B. | ecl 100k |
| C. | ecl 1000k |
| D. | ecl 10000k |
| Answer» B. ecl 100k | |
| 45. |
All input of NOR as low produces result as |
| A. | low |
| B. | mid |
| C. | high |
| D. | high impedance |
| Answer» C. high | |
| 46. |
In RTL NOR gate, the output is at logic 1 only when all the inputs are at |
| A. | logic 0 |
| B. | logic 1 |
| C. | +10v |
| D. | floating |
| Answer» A. logic 0 | |
| 47. |
The full form of CMOS is |
| A. | capacitive metal oxide semiconductor |
| B. | capacitive metallic oxide semiconductor |
| C. | complementary metal oxide semiconductor |
| D. | complemented metal oxide semiconductor |
| Answer» C. complementary metal oxide semiconductor | |
| 48. |
The full form of COS-MOS is |
| A. | complementary symmetry metal oxide semiconductor |
| B. | complementary systematic metal oxide semiconductor |
| C. | capacitive symmetry metal oxide semiconductor |
| D. | complemented systematic metal oxide semiconductor |
| Answer» A. complementary symmetry metal oxide semiconductor | |
| 49. |
CMOS is also sometimes referred to as |
| A. | capacitive metal oxide semiconductor |
| B. | capacitive symmetry metal oxide semiconductor |
| C. | complementary symmetry metal oxide semiconductor |
| D. | complemented symmetry metal oxide semiconductor |
| Answer» C. complementary symmetry metal oxide semiconductor | |
| 50. |
CMOS technology is used in |
| A. | inverter |
| B. | microprocessor |
| C. | digital logic |
| D. | both microprocessor and digital logic |
| Answer» D. both microprocessor and digital logic | |
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