The terms "low speed" and "high speed," applied to logic circuits, refer to the

Related MCQs

• The problem of different current requirements when CMOS logic circuits are driving TTL logic circuits can usually be overcome by the addition of:
• How does the 4000 series of CMOS logic compare in terms of speed and power dissipation to the standard family of TTL logic?
• A universal logic gate is one, which can be used to generate any logic function. Which of the following is a universal logic gate?
• The low to high or high to low transition of the clock is considered to be a(n)                
• The implementation of simplified sum-of-products expressions may be easily implemented into actual logic circuits using all universal                 gates with little or no increase in circuit complexity. (Select the response for the blank space that will BEST make the statement true.)
• The clock signals are used in sequential logic circuits to
• For the device shown here, let all D inputs be LOW, both S inputs be HIGH, and the input be LOW. What is the status of the Y output?
• A certain BCD-to-decimal decoder has active-HIGH inputs and active- LOW outputs. Which output goes LOW when the inputs are 1001?
• What parameter causes the main limit on fan-out of CMOS logic in high-speed applications?
• Which of the following logic families is well suited for high-speed operations ?