The I/O processor has a direct access to ....................... and contains a number of independent data channels.

Related MCQs

• Devices that are used primarily to transport data between the processor and the user are known as ....
• When the character is transferred to the processor, status control flag SIN is automatically cleared to ............................
• In case of only one memory operand, when a second operand is needed, as in the case of an Add instruction, we use processor register called .........
• The access time of memory is ............... the time required for performing any single CPU operation.
• Memory access in RISC architecture is limited to instructions ........
• Access time is
• State whether the following statement is True or False for PCI bus. i) The PCI bus tuns at 33 MHZ and can transfer 32-bits of data(four bytes) every clock tick. ii) The PCI interface chip may support the video adapter, the EIDE disk controller chip and may be two external adapter cards. iii) PCI bus deliver the different throughout only on a 32-bit interface that other parts of the machine deliver through a 64-bit path.
• The channel which handles the multiple requests and multiplexes the data transfers from these devices a byte at a time is known as .....
• Data transfer between the main memory and the CPU register takes place through two registers namely .......
• Data hazards occur when .....................