McqMate
| 1. |
A collection of lines that connects several devices is called .............. |
| A. | bus |
| B. | peripheral connection wires |
| C. | Both a and b |
| D. | internal wires |
| Answer» A. bus | |
| 2. |
A complete microcomputer system consist of ........... |
| A. | microprocessor |
| B. | memory |
| C. | peripheral equipment |
| D. | all of the above |
| Answer» D. all of the above | |
| 3. |
PC Program Counter is also called ................... |
| A. | instruction pointer |
| B. | memory pointer |
| C. | data counter |
| D. | file pointer |
| Answer» A. instruction pointer | |
| 4. |
In a single byte how many bits will be there? |
| A. | 8 |
| B. | 16 |
| C. | 4 |
| D. | 32 |
| Answer» A. 8 | |
| 5. |
CPU does not perform the operation .................. |
| A. | data transfer |
| B. | logic operation |
| C. | arithmetic operation |
| D. | all of the above |
| Answer» A. data transfer | |
| 6. |
The access time of memory is ............... the time required for performing any single CPU operation. |
| A. | Longer than |
| B. | Shorter than |
| C. | Negligible than |
| D. | Same as |
| Answer» A. Longer than | |
| 7. |
Memory address refers to the successive memory words and the machine is called as ............ |
| A. | word addressable |
| B. | byte addressable |
| C. | bit addressable |
| D. | Terra byte addressable |
| Answer» A. word addressable | |
| 8. |
A microprogram written as string of 0's and 1's is a ............. |
| A. | Symbolic microinstruction |
| B. | binary microinstruction |
| C. | symbolic microinstruction |
| D. | binary micro-program |
| Answer» D. binary micro-program | |
| 9. |
A pipeline is like .................... |
| A. | an automobile assembly line |
| B. | house pipeline |
| C. | both a and b |
| D. | a gas line |
| Answer» A. an automobile assembly line | |
| 10. |
Data hazards occur when ..................... |
| A. | Greater performance loss |
| B. | Pipeline changes the order of read/write access to operands |
| C. | Some functional unit is not fully pipelined |
| D. | Machine size is limited |
| Answer» B. Pipeline changes the order of read/write access to operands | |
| 11. |
The time that elapses between the initiation of an operation and completion of that operation is called..... |
| A. | throughput |
| B. | memory response time |
| C. | memory access time |
| D. | execution time |
| Answer» C. memory access time | |
| 12. |
Interrupts which are initiated by an instruction are ............ |
| A. | internal |
| B. | external |
| C. | hardware |
| D. | software |
| Answer» B. external | |
| 13. |
A semiconductor memory constructed using bipolar transistors or MOS transistor stores information in the form of a ...................... |
| A. | Flip-flop voltage levels |
| B. | bit |
| C. | byte |
| D. | opcodes values |
| Answer» A. Flip-flop voltage levels | |
| 14. |
A simple way of performing I/O tasks is to use a method known as ...................... |
| A. | program-controlled I/O |
| B. | program-controlled input |
| C. | program-controlled output |
| D. | I/O operation |
| Answer» A. program-controlled I/O | |
| 15. |
Memory access in RISC architecture is limited to instructions ........ |
| A. | CALL and RET |
| B. | PUSH and POP |
| C. | STA and LDA |
| D. | MOV and JMP |
| Answer» C. STA and LDA | |
| 16. |
Striking key stores the corresponding character code in a 8-bit buffer register associated with the keyboard. This register is called as ........................ |
| A. | DATAINOUT |
| B. | DATAOUT |
| C. | DATAIN |
| D. | Both A and B |
| Answer» C. DATAIN | |
| 17. |
When the character is transferred to the processor, status control flag SIN is automatically cleared to ............................ |
| A. | zero |
| B. | one |
| C. | two |
| D. | yes |
| Answer» A. zero | |
| 18. |
A microprogram written as string of 0's and 1's is a ... |
| A. | symbolic micro-instruction |
| B. | binary micro-instruction |
| C. | symbolic micro-instruction |
| D. | binary microprogram |
| Answer» D. binary microprogram | |
| 19. |
An exception conditions in a computer system by an event external to the CPU is called ......... |
| A. | Interrupt |
| B. | halt |
| C. | wait |
| D. | process |
| Answer» A. Interrupt | |
| 20. |
When the CPU detects an interrupt, it then saves its ................... |
| A. | Previous state |
| B. | Next state |
| C. | Current state |
| D. | Both A and B |
| Answer» C. Current state | |
| 21. |
An exception condition in a computer system caused by an event external to the CPU is called ........ |
| A. | Interrupt |
| B. | Halt |
| C. | Wait |
| D. | Process |
| Answer» A. Interrupt | |
| 22. |
When the CPU detects an interrupt, it then saves its ............. |
| A. | Previous State |
| B. | Next State |
| C. | Current State |
| D. | Both A and B |
| Answer» C. Current State | |
| 23. |
A microprogram is sequencer perform the operation... |
| A. | read |
| B. | write |
| C. | read and write |
| D. | read and execute |
| Answer» D. read and execute | |
| 24. |
A computer program that converts an entire program into machine language at one time is called |
| A. | interpreter |
| B. | simulator |
| C. | compiler |
| D. | commander |
| Answer» C. compiler | |
| 25. |
The unit which decodes and translates each instruction and generates the necessary enable signals for ALU and other units is called .. |
| A. | arithmetic unit |
| B. | logical unit |
| C. | control unit |
| D. | CPU |
| Answer» C. control unit | |
| 26. |
State whether the following statement is True or False for cache memory.
|
| A. | i- True, ii- False, iii-True |
| B. | i- False, ii- True, iii-True |
| C. | i-True, ii-True, iii-False |
| D. | i- False, ii- False, iii-True |
| Answer» C. i-True, ii-True, iii-False | |
| 27. |
The channel which handles the multiple requests and multiplexes the data transfers from these devices a byte at a time is known as ..... |
| A. | multiplexor channel |
| B. | the selector channel |
| C. | block multiplex channel |
| D. | both A and C |
| Answer» A. multiplexor channel | |
| 28. |
The address mapping is done, when the program is initially loaded is called ...... |
| A. | dynamic relocation |
| B. | relocation |
| C. | static relocation |
| D. | dynamic as well as static relocation |
| Answer» C. static relocation | |
| 29. |
State whether the following statement is True or False for PCI bus.
|
| A. | i- True, ii- False, iii-True |
| B. | i- False, ii- True, iii-True |
| C. | i-True, ii-True, iii-False |
| D. | i- False, ii- False, iii-True |
| Answer» C. i-True, ii-True, iii-False | |
| 30. |
The I/O processor has a direct access to ....................... and contains a number of independent data channels. |
| A. | main memory |
| B. | secondary memory |
| C. | cache |
| D. | flash memory |
| Answer» A. main memory | |
| 31. |
The computer code for the interchange of information between terminal is .. |
| A. | ASCII |
| B. | BCD |
| C. | EBCDIC |
| D. | All of the above |
| Answer» A. ASCII | |
| 32. |
SIMD stands for .... |
| A. | Single Instruction Stream Over Multiple Data Streams |
| B. | Single Instruction Stream Over Minimum Data Streams |
| C. | Single Instruction Stream Over Media Data Streams |
| D. | Multiple Instruction Streams and Single Data Stream |
| Answer» A. Single Instruction Stream Over Multiple Data Streams | |
| 33. |
The NOR gate is complement of .. |
| A. | AND gate |
| B. | OR gate |
| C. | NAND gate |
| D. | NOT gate |
| Answer» B. OR gate | |
| 34. |
A .............. is a digital circuit that performs the inverse operation of decodes. |
| A. | multiplexer |
| B. | adder |
| C. | subtractor |
| D. | encoder |
| Answer» D. encoder | |
| 35. |
Pipelining increases the CPU instruction .......... |
| A. | efficiency |
| B. | latency |
| C. | throughput |
| D. | Both a and c |
| Answer» C. throughput | |
| 36. |
The ............... is a program whose function is to start the computer software operating when power is turned on. |
| A. | Bootstrap loader |
| B. | Multi programming |
| C. | Loader |
| D. | None of the above |
| Answer» A. Bootstrap loader | |
| 37. |
.................. is concerned with the way the hardware components operate to form computer system. |
| A. | Computer organization |
| B. | Computer design |
| C. | Computer architecture |
| D. | Computer implementation |
| Answer» A. Computer organization | |
| 38. |
Devices that are used primarily to transport data between the processor and the user are known as .... |
| A. | Networking devices |
| B. | Basic storage devices |
| C. | Data presentation device |
| D. | Data transfer device |
| Answer» C. Data presentation device | |
| 39. |
Which statement is valid about computer program? |
| A. | It is understood by a computer |
| B. | It is understood by programmer |
| C. | It is understood to use |
| D. | All of the above |
| Answer» D. All of the above | |
| 40. |
Access time is |
| A. | Time to position the head over proper track |
| B. | Time to position the head over proper sector |
| C. | Time to position the head over proper cylinder |
| D. | None of above |
| Answer» A. Time to position the head over proper track | |
| 41. |
Memory unit that communicates directly with the CPU is called the ........... |
| A. | Main memory |
| B. | Secondary memory |
| C. | Auxiliary memory |
| D. | Register |
| Answer» A. Main memory | |
| 42. |
CISC stands for ................ |
| A. | Common Instruction Set Computers |
| B. | Complex Instruction Set Compilers |
| C. | Complex Instruction Set Computers |
| D. | Compound Instruction Set Computers |
| Answer» C. Complex Instruction Set Computers | |
| 43. |
The communication between central system and the outside environment is done by |
| A. | Input-output subsystem |
| B. | Control system |
| C. | Memory system |
| D. | Logic system |
| Answer» A. Input-output subsystem | |
| 44. |
The register that keeps track of the instructions in the program stored in memory is .. |
| A. | Control register |
| B. | Program counter |
| C. | Status register |
| D. | Direct register |
| Answer» B. Program counter | |
| 45. |
................ is a small very speed register file maintained by the instruction fetch segment of the pipeline. |
| A. | Branch Target Buffer |
| B. | Loop buffer |
| C. | Branch loop buffer |
| D. | Target register |
| Answer» B. Loop buffer | |
| 46. |
In case of only one memory operand, when a second operand is needed, as in the case of an Add instruction, we use processor register called ......... |
| A. | accumulator |
| B. | register |
| C. | operand |
| D. | source |
| Answer» D. source | |
| 47. |
Data transfer between the main memory and the CPU register takes place through two registers namely ....... |
| A. | general purpose register and MDR |
| B. | accumulator and program counter |
| C. | MAR and MDR |
| D. | MAR and Accumulator |
| Answer» C. MAR and MDR | |
| 48. |
The pipeline operates on a stream of instruction by overlapping the phases of instruction cycle is ........ |
| A. | Arithmetic pipeline |
| B. | Instruction pipeline |
| C. | Parallel pipeline |
| D. | Multiple pipeline |
| Answer» B. Instruction pipeline | |
| 49. |
The instruction that cause transfer of data from one location to another without changing the binary information content are ... |
| A. | Data transfer instruction |
| B. | Data manipulation instruction |
| C. | Register transfer instruction |
| D. | Program control instruction |
| Answer» A. Data transfer instruction | |
| 50. |
The branch logic that provides decision making capabilities in the control unit is known as .. |
| A. | Controlled transfer |
| B. | Conditional transfer |
| C. | Unconditional transfer |
| D. | None of above |
| Answer» C. Unconditional transfer | |
Done Reading?