There exists a separate block consisting of various units to decode an instruction.

Related MCQs

• There exists a separate block to increment the PC in multiple BUS organisation.
• Two processors A and B have clock frequencies of 700 Mhz and 900 Mhz respectively. Suppose A can execute an instruction with an average of 3 steps and B can execute with an average of 5 steps. For the execution of the same instruction which processor is faster?
• A processor performing fetch or decoding of different instruction during the execution of another instruction is called               
• The LINK instruction is always followed by                           instruction.
• Two processors A and B have clock frequencies of 700 Mhz and 900 Mhz respectively. Suppose A can execute an instruction with an average of 3 steps and B can execute with an average of 5 steps. For the execution of the same instruction which processor is faster.
• In direct mapping the presence of the block in memory is checked with the help of block field.
• A common strategy for performance is making various functional units operate parallelly.
• In set associative and associative mapping there exists less flexibility.
• In intel’s IA-32 architecture there is a separate 16 bit address space for the I/O devices.
• The decoded instruction is stored in