Low-voltage positive emitter-coupled logic (LVPECL) is a power optimized version of                      

Related MCQs

•                            expressions can be implemented using either (1) 2-level AND- OR logic circuits or (2) 2-level NAND logic circuits.
• Which logic is the fastest of all the logic families?
• What causes low-power Schottky TTL to use less power than the 74XX series TTL?
• The generic array logic (GAL) device is ________.
• A logic circuit that provides a HIGH output for both inputs HIGH or both inputs LOW is a(n):
• A logic circuit that provides a HIGH output if one input or the other input, but not both, is HIGH, is a(n):
• Refer to the given figures (a) and (b). A logic analyzer is used to check the circuit in figure (a) and displays the waveforms shown in figure (b). The actual analyzer display shows all four data outputs, Q0-Q3. The analyzer's cursor is placed at position X and all four of the data output lines show a LOW level output. What is wrong, if anything, with the circuit?
• PALs tend to execute ________ logic.
• A logic circuit that provides a HIGH output for both inputs HIGH or both inputs LOW is
• The selector inputs to an arithmetic/logic unit (ALU) determine the