Q.

7 BIASING BJT SWITCHING CIRCUITSJFET - DC LOAD LINE AND BIAS POINT, VARIOUS BIASING METHODS OF JFET - JFET BIAS CIRCUIT DESIGN

A. rd < 6kΩ
B. rd > 6kΩ
C. rd > 4kΩ
D. rd < 4kΩ
Answer» A. rd < 6kΩ
Explanation: in given circuit, vgs = -5v vds = vdd – idsrd
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