McqMate
| 1. |
In a chip, which type/s of pad design/s is/are adopted to solve the problem of pin count? |
| A. | input pad design |
| B. | output pad design |
| C. | three state pad design |
| D. | all of the above |
| Answer» C. three state pad design | |
| 2. |
Maze routing is used to determine the _______path for a single wire between a set of points, if any path exists. |
| A. | shortest |
| B. | average |
| C. | longest |
| D. | none of the above |
| Answer» A. shortest | |
| 3. |
What is the format of IP address? |
| A. | 34 bit |
| B. | 16 bit |
| C. | 64 bit |
| D. | 32 bit |
| Answer» D. 32 bit | |
| 4. |
Many desktops and operating systems include which protocol? |
| A. | ipv6 protocol |
| B. | ipv4 protocol |
| C. | both ipv6 and ipv4 protocol |
| D. | ipv3 protocol |
| Answer» A. ipv6 protocol | |
| 5. |
What does I2C stand for? |
| A. | inter-ic |
| B. | intra-ic |
| C. | individual integrated chip |
| D. | intel ic |
| Answer» A. inter-ic | |
| 6. |
Which are the two lines used in the I2C? |
| A. | sda and spdr |
| B. | spdr and scl |
| C. | sda and scl |
| D. | scl and status line |
| Answer» C. sda and scl | |
| 7. |
A packet is also referred to as |
| A. | postcard |
| B. | telegram |
| C. | letter |
| D. | data |
| Answer» B. telegram | |
| 8. |
WLANs use high power levels and generally require a license for spectrum use. (True or False) |
| A. | true |
| B. | false |
| Answer» B. false | |
| 9. |
Which of the following specifies a set of media access control (MAC) and physical layer specifications for implementing WLANs? |
| A. | ieee 802.16 |
| B. | ieee 802.3 |
| C. | ieee 802.11 |
| D. | ieee 802.15 |
| Answer» C. ieee 802.11 | |
| 10. |
What is the nominal range of Bluetooth? |
| A. | 1 km |
| B. | 10 m |
| C. | 1 m |
| D. | 10 km |
| Answer» B. 10 m | |
| 11. |
Bluetooth operates in which band? |
| A. | ka band |
| B. | l band |
| C. | ku band |
| D. | 2.4 ghz ism band |
| Answer» D. 2.4 ghz ism band | |
| 12. |
Which one of the following offers CPUs as integrated memory or peripheral interfaces? |
| A. | microcontroller |
| B. | microprocessor |
| C. | embedded system |
| D. | memory system |
| Answer» A. microcontroller | |
| 13. |
Which of the following offers external chips for memory and peripheral interface circuits? |
| A. | microcontroller |
| B. | microprocessor |
| C. | peripheral system |
| D. | embedded system |
| Answer» B. microprocessor | |
| 14. |
Which one of the following is the successor of 8086 and 8088 processor? |
| A. | 80386 |
| B. | 80286 |
| C. | 80288 |
| D. | 80388 |
| Answer» B. 80286 | |
| 15. |
Which of the following processor possess memory management? |
| A. | 80286 |
| B. | 80386 |
| C. | 8086 |
| D. | 8088 |
| Answer» A. 80286 | |
| 16. |
Which of the following is false with respect to UDP? |
| A. | connection-oriented |
| B. | unreliable |
| C. | transport layer protocol |
| D. | low overhead |
| Answer» A. connection-oriented | |
| 17. |
Beyond IP, UDP provides additional services such as _______ |
| A. | routing and switching |
| B. | sending and receiving of packets |
| C. | multiplexing and demultiplexing |
| D. | demultiplexing and error checking |
| Answer» D. demultiplexing and error checking | |
| 18. |
What is the header size of a UDP packet? |
| A. | 8 bytes |
| B. | 8 bits |
| C. | 16 bytes |
| D. | 124 bytes |
| Answer» A. 8 bytes | |
| 19. |
In TCP, sending and receiving data is done as _______ |
| A. | stream of bytes |
| B. | sequence of characters |
| C. | lines of data |
| D. | packets |
| Answer» A. stream of bytes | |
| 20. |
Communication offered by TCP is ________ |
| A. | byte by byte |
| B. | full-duplex |
| C. | half-duplex |
| D. | semi-duplex |
| Answer» B. full-duplex | |
| 21. |
What kind of socket does an external EPROM to plugged in for prototyping? |
| A. | piggyback |
| B. | single socket |
| C. | multi-socket |
| D. | piggyback reset socket |
| Answer» A. piggyback | |
| 22. |
Which is the single device capable of providing prototyping support for a range of microcontroller? |
| A. | rom |
| B. | umbrella device |
| C. | otp |
| D. | ram |
| Answer» B. umbrella device | |
| 23. |
Which of the following can determine if two masters start to use the bus at the same time? |
| A. | counter detect |
| B. | collision detect |
| C. | combined format |
| D. | auto-incremental counter |
| Answer» B. collision detect | |
| 24. |
Which of the following provides an efficient method for transferring data from a peripheral to memory? |
| A. | dma controller |
| B. | serial port |
| C. | parallel port |
| D. | dual port |
| Answer» A. dma controller | |
| 25. |
Which among the below stated lines represent the handshaking variant usually and only controlled by the software in the handshaking process? |
| A. | xon/ xoff |
| B. | dcd & gnd |
| C. | txd & rxd |
| D. | all of the above |
| Answer» A. xon/ xoff | |
| 26. |
What does an IC that initiate or enable the data transfer on bus can be regarded as, in accordance to the I2c protocol specifications? |
| A. | bus slaves |
| B. | bus master |
| C. | bus drivers |
| D. | bus data carriers |
| Answer» B. bus master | |
| 27. |
______ is a technology that allows telephone calls to be made over computer networks like the Internet. |
| A. | voip |
| B. | gsm |
| C. | modem |
| D. | cdma |
| Answer» A. voip | |
| 28. |
Which development tool can facilitate the creation and modification of source programs in addition to assembly and higher -level languages? |
| A. | compiler |
| B. | linker |
| C. | assembler |
| D. | editor |
| Answer» D. editor | |
| 29. |
Which types of an embedded systems involve the coding at a simple level in an embedded 'C', without any necessity of RTOS? |
| A. | sophisticated embedded systems |
| B. | medium scale embedded systems |
| C. | small scale embedded systems |
| D. | all of the above |
| Answer» C. small scale embedded systems | |
| 30. |
While designing an embedded system, which sub-task oriented process allocates the time steps for various modules that share the similar resources? |
| A. | simulation and validation |
| B. | iteration |
| C. | hardware-software partitioning |
| D. | scheduling |
| Answer» D. scheduling | |
| 31. |
The step where in the results stored in the temporary register is transferred into the permanent register is called as ______ |
| A. | final step |
| B. | commitment step |
| C. | last step |
| D. | inception step |
| Answer» B. commitment step | |
| 32. |
If an exception is raised and the succeeding instructions are executed completely, then the processor is said to have ______ |
| A. | exception handling |
| B. | imprecise exceptions |
| C. | error correction |
| D. | none of the mentioned |
| Answer» B. imprecise exceptions | |
| 33. |
For applications that demand very high data-processing requirements, or if double precision floating point calculation is needed, then best choice will be |
| A. | cortex-m0 processor |
| B. | cortex-m3 processor |
| C. | cortex-m7 processor |
| D. | cortex-m0+ processor |
| Answer» C. cortex-m7 processor | |
| 34. |
Which scheme/ strategy is suitable to establish the communication between the access point (AP) and the infrastructure of LANs? |
| A. | non-reception of frame & necessity of retransmission |
| B. | no necessity of working in duplex mode for the host |
| C. | no necessity to prevent the signal fading |
| D. | all of the above |
| Answer» A. non-reception of frame & necessity of retransmission | |
| 35. |
Unauthorised access of information from a wireless device through a bluetooth connection is called _________ |
| A. | bluemaking |
| B. | bluestring |
| C. | bluestring |
| D. | bluesnarfing |
| Answer» D. bluesnarfing | |
| 36. |
Suppose a TCP connection is transferring a file of 1000 bytes. The first byte is numbered 10001. What is the sequence number of the segment if all data is sent in only one segment? |
| A. | 10001 |
| B. | 12001 |
| C. | 14000 |
| D. | 12002 |
| Answer» A. 10001 | |
| 37. |
Bytes of data being transferred in each connection are numbered by TCP. These numbers start with a _________ |
| A. | fixed number |
| B. | random sequence of 0’s and 1’s |
| C. | one |
| D. | sequence of zero’s and one’s |
| Answer» D. sequence of zero’s and one’s | |
| 38. |
Which of the following are external pins whose logic state can be controlled by the processor to either be a logic zero or logic one is known as |
| A. | analogue value |
| B. | display values |
| C. | binary values |
| D. | time derived digital outputs |
| Answer» C. binary values | |
| 39. |
Which of the following has a quadruple buffered receiver and a double buffered transmitter? |
| A. | intel 8250 |
| B. | 16450 |
| C. | 16550 |
| D. | mc68681 |
| Answer» D. mc68681 | |
| 40. |
process that is based on IPC mechanism which executes on different systems and can communicate with other processes using message based communication, is called ________ |
| A. | local procedure call |
| B. | inter process communication |
| C. | remote procedure call |
| D. | remote machine invocation |
| Answer» C. remote procedure call | |
| 41. |
Which abstraction level undergo the compilation process by converting a sequential program into finite-state machine and register transfers while designing an embedded system? |
| A. | system |
| B. | behaviour |
| C. | rt |
| D. | logic |
| Answer» B. behaviour | |
| 42. |
Which characteristics of an embedded system exhibit the responsiveness to the assortments or variations in system's environment by computing specific results for real-time applications without any kind of postponement ? |
| A. | single-functioned characteristic |
| B. | tightly-constraint characteristics |
| C. | reactive & real time characteristics |
| D. | all of the above |
| Answer» C. reactive & real time characteristics | |
| 43. |
Which potential mode of operation indicate the frequent sending of byte to the slave corresponding to the reception of an acknowledge signal when it becomes desirable for the master to write to the slave during data transmission in I2C bus? |
| A. | master in master-transmit mode & slave in slave-receive mode |
| B. | slave in slave-transmit mode & master in master-receive mode |
| C. | master in master-transmit mode as well as master-receive mode |
| D. | slave in slave-transmit mode as well as slave-receive mode |
| Answer» A. master in master-transmit mode & slave in slave-receive mode | |
| 44. |
Which method of multiple secondary communication in TDMA is acquired/adopted by bluetooth especially where data integrity becomes more crucial than avoiding latency? |
| A. | synchronous connection-oriented (sco) link |
| B. | asynchronous connectionless link (acl) |
| C. | both a & b |
| D. | none of the above |
| Answer» B. asynchronous connectionless link (acl) | |
| 45. |
The upper 128 bytes of an internal data memory from 80H through FFH usually represent ___________. |
| A. | general-purpose registers |
| B. | special function registers |
| C. | stack pointers |
| D. | program counters |
| Answer» B. special function registers | |
| 46. |
Which standard govern parallel communications? |
| A. | RS232 |
| B. | RS-232a |
| C. | CAT 5 |
| D. | IEEE 1284 |
| Answer» D. IEEE 1284 | |
| 47. |
Which common bus specification provides the fastest data transfer rate? |
| A. | VL bus |
| B. | ISA |
| C. | PCI |
| D. | All of the above |
| Answer» C. PCI | |
| 48. |
Devices that use the ____ bus are self-configuring. |
| A. | EISA |
| B. | ISA |
| C. | MCA |
| D. | PCI |
| Answer» D. PCI | |
| 49. |
Which of following is not a valid bus in computer system ? |
| A. | Data Bus |
| B. | Memory Bus |
| C. | Address Bus |
| D. | System Bus |
| Answer» B. Memory Bus | |
| 50. |
The AT bus is also known as the ____ bus. |
| A. | 286 |
| B. | 8-bit ISA |
| C. | 16-bit ISA |
| D. | ISA |
| Answer» C. 16-bit ISA | |
| 51. |
The PCI follows a set of standards primarily used in _____ PC’s. |
| A. | intel |
| B. | motorola |
| C. | sun |
| D. | IBM |
| Answer» D. IBM | |
| 52. |
How may standard levels of interrupts are provided on the 8-bit ISA bus (XT-class computer)? |
| A. | 4 |
| B. | 8 |
| C. | 12 |
| D. | 16 |
| Answer» B. 8 | |
| 53. |
The acronym HDI stands for: The acronym HDI stands for: |
| A. | Half duplex interface |
| B. | Hard disk |
| C. | Hard disk interface |
| D. | Help desk interference |
| Answer» C. Hard disk interface | |
| 54. |
Bus which used to connect the monitor to the CPU is |
| A. | PCI bus |
| B. | SCSI bus |
| C. | memory bus |
| D. | rambus |
| Answer» B. SCSI bus | |
| 55. |
Bus which is used to connect Macintosh keyboards and mouse is |
| A. | USB |
| B. | FireWire |
| C. | SCSI |
| D. | ISA |
| Answer» A. USB | |
| 56. |
The device which starts data transfer is called __________ |
| A. | Master |
| B. | Transactor |
| C. | Distributor |
| D. | Initiator |
| Answer» D. Initiator | |
| 57. |
The method which offers higher speeds of I/O transfers is ___________ |
| A. | Memory mapping |
| B. | Interrupts |
| C. | Program-controlled I/O |
| D. | DMA |
| Answer» D. DMA | |
| 58. |
The asynchronous BUS mode of transmission allows for a faster mode of data transfer. |
| A. | true |
| B. | false |
| Answer» B. false | |
| 59. |
______ is used as an intermediate to extend the processor BUS. |
| A. | Bridge |
| B. | Router |
| C. | Gateway |
| D. | Connector |
| Answer» A. Bridge | |
| 60. |
________ is an extension of the processor BUS. |
| A. | SCSI BUS |
| B. | USB |
| C. | PCI BUS |
| D. | None of the mentioned |
| Answer» C. PCI BUS | |
| 61. |
The system developed by IBM with ISA architecture is ______ |
| A. | SPARK |
| B. | SUN-SPARK |
| C. | PC-AT |
| D. | None of the mentioned |
| Answer» C. PC-AT | |
| 62. |
The best mode of connection between devices which need to send or receive large amounts of data over a short distance is _____ |
| A. | Bus |
| B. | Serial Port |
| C. | Parallel port |
| D. | Isochronous port |
| Answer» C. Parallel port | |
| 63. |
The device which is allowed to initiate data transfers on the BUS at any time is called _____ |
| A. | Bus Master |
| B. | Processor |
| C. | Controller |
| D. | BUS arbitrator |
| Answer» A. Bus Master | |
| 64. |
The method of synchronising the processor with the I/O device in which the device sends a signal when it is ready is? |
| A. | Signal handling |
| B. | Exception |
| C. | Interrupts |
| D. | DMA |
| Answer» C. Interrupts | |
| 65. |
The PCI BUS supports _____ address space/s. |
| A. | I/O |
| B. | Memory |
| C. | Configuration |
| D. | All of the mentioned |
| Answer» D. All of the mentioned | |
| 66. |
The _________ present a uniform device-access interface to the I/O subsystem, much as system calls provide a standard interface between the application and the operating system. |
| A. | Devices |
| B. | Buses |
| C. | Device drivers |
| D. | I/O systems |
| Answer» C. Device drivers | |
| 67. |
An I/O port typically consists of four registers status, control, ________ and ________ registers. |
| A. | system in, system out |
| B. | data in, data out |
| C. | flow in, flow out |
| D. | input, output |
| Answer» B. data in, data out | |
| 68. |
The CPU hardware has a wire called __________ that the CPU senses after executing every instruction. |
| A. | interrupt request line |
| B. | interrupt bus |
| C. | interrupt receive line |
| D. | interrupt sense line |
| Answer» A. interrupt request line | |
| 69. |
The _________ determines the cause of the interrupt, performs the necessary processing and executes a return from the interrupt instruction to return the CPU to the execution state prior to the interrupt. |
| A. | interrupt request line |
| B. | device driver |
| C. | interrupt handler |
| D. | All of Above |
| Answer» C. interrupt handler | |
| 70. |
The usual BUS structure used to connect the I/O devices is ___________ |
| A. | Star BUS structure |
| B. | Multiple BUS structure |
| C. | Single BUS structure |
| D. | Node to Node BUS structure |
| Answer» C. Single BUS structure | |
| 71. |
The method of accessing the I/O devices by repeatedly checking the status flags is ___________ |
| A. | Memory-mapped I/O |
| B. | Program-controlled I/O |
| C. | I/O mapped |
| D. | None of the mentioned |
| Answer» B. Program-controlled I/O | |
| 72. |
The classification of BUSes into synchronous and asynchronous is based on __________ |
| A. | The devices connected to them |
| B. | The type of data transfer |
| C. | The Timing of data transfers |
| D. | None of the mentioned |
| Answer» C. The Timing of data transfers | |
| 73. |
In synchronous BUS, the devices get the timing signals from __________ |
| A. | Timing generator in the device |
| B. | A common clock line |
| C. | The Timing of data transfers |
| D. | None of the mentioned |
| Answer» B. A common clock line | |
| 74. |
The asynchronous BUS mode of transmission allows for a faster mode of data transfer. |
| A. | true |
| B. | false |
| Answer» B. false | |
| 75. |
The use of spooler programs or _______ Hardware allows PC operators to do the processing work at the same time a printing operation is in progress. |
| A. | Register |
| B. | memory |
| C. | Buffer |
| D. | Cpu |
| Answer» B. memory | |
| 76. |
What is the full form of ISA? |
| A. | Industry Standard Architecture |
| B. | International American Standard |
| C. | International Standard Architecture |
| D. | None of the mentioned |
| Answer» A. Industry Standard Architecture | |
| 77. |
The disadvantage of using a parallel mode of communication is ______ |
| A. | All of the mentioned |
| B. | Leads to erroneous data transfer |
| C. | Security of data |
| D. | It is costly |
| Answer» D. It is costly | |
| 78. |
The transformation between the Parallel and serial ports is done with the help of ______ |
| A. | Flip flops |
| B. | Logic circuits |
| C. | Shift registers |
| D. | None of the mentioned |
| Answer» C. Shift registers | |
| 79. |
What WLAN device provides communications management services to wireless workstations? |
| A. | Access Point |
| B. | Antenna |
| C. | Network Adaptor |
| D. | Repeater |
| Answer» A. Access Point | |
| 80. |
RS-232, RS-449, RS-530, V-24, and X-21 are examples of? |
| A. | standards for various types of transmission channels. |
| B. | standards for interfaces between terminals and modems. |
| C. | two methods of error detection and correction |
| D. | standards for end-to-end performance of data communication systems. |
| Answer» B. standards for interfaces between terminals and modems. | |
| 81. |
Many cables have “RS-232” connectors with some wires crossed or connected to each other because…. |
| A. | there are various RS-232 standards. |
| B. | asynchronous modem reverses the direction of transmitted and received data from the standard. |
| C. | accept commands from the terminals Via Rs-232 interface. |
| D. | many computers and peripherals use RS-232 serial interfaces, but not as DTE-to-DCE |
| Answer» D. many computers and peripherals use RS-232 serial interfaces, but not as DTE-to-DCE | |
| 82. |
Which protocol standard of serial communication specify the bi-directional and half-duplex form of data transmission by allowing various numbers of drivers and receivers in bus configuration? |
| A. | RS232 |
| B. | RS2485 |
| C. | RS422 |
| D. | RS423 |
| Answer» B. RS2485 | |
| 83. |
What is the maximum device handling capacity of serial standard protocol RS485 in terms of drivers and receivers on a single line? |
| A. | 8 |
| B. | 10 |
| C. | 16 |
| D. | 32 |
| Answer» D. 32 | |
| 84. |
The main importance of ARM micro-processors is providing operation with ______ |
| A. | Low cost and low power consumption |
| B. | Higher degree of multi-tasking |
| C. | Lower error or glitches |
| D. | Efficient memory management |
| Answer» A. Low cost and low power consumption | |
| 85. |
The address system supported by ARM systems is/are ___________ |
| A. | Little Endian |
| B. | Big Endian |
| C. | X-Little Endian |
| D. | Both Little & Big Endian |
| Answer» D. Both Little & Big Endian | |
| 86. |
Which of the following is the type of SPI controller? |
| A. | Queued SPI |
| B. | Microwire |
| C. | Microwire/plus |
| D. | Quad SPI |
| Answer» A. Queued SPI | |
| 87. |
How buffers are enabled in the parallel ports? |
| A. | by the data register |
| B. | by data direction register |
| C. | by individual control register |
| D. | by data and individual control register |
| Answer» B. by data direction register | |
| 88. |
Which peripheral port provides the FASTEST throughput to laser printers? |
| A. | RS-232 |
| B. | SCSI |
| C. | Parallel |
| D. | Serial |
| Answer» C. Parallel | |
| 89. |
Advantages of SPI are….. |
| A. | It\s faster than asynchronous serial. |
| B. | The receive hardware can be a simple shift register. |
| C. | It supports multiple slaves. |
| D. | All of Above |
| Answer» D. All of Above | |
| 90. |
In a safety critical system, incorrect operation ____________ |
| A. | does not affect much |
| B. | causes minor problems |
| C. | causes major and serious problems |
| D. | none of the mentioned |
| Answer» C. causes major and serious problems | |
| 91. |
Antilock brake systems, flight management systems, pacemakers are examples of ____________ |
| A. | safety critical system |
| B. | hard real time system |
| C. | soft real time system |
| D. | safety critical system and hard real time system |
| Answer» D. safety critical system and hard real time system | |
| 92. |
Some of the properties of real time systems include ____________ |
| A. | single purpose |
| B. | inexpensively mass produced |
| C. | small size |
| D. | all of the mentioned |
| Answer» D. all of the mentioned | |
| 93. |
The technique in which the CPU generates physical addresses directly is known as ____________ |
| A. | relocation register method |
| B. | real addressing |
| C. | virtual addressing |
| D. | none of the mentioned |
| Answer» B. real addressing | |
| 94. |
Hard real time operating system has ______________ jitter than a soft real time operating system. |
| A. | less |
| B. | more |
| C. | equal |
| D. | none of the mentioned |
| Answer» A. less | |
| 95. |
In rate monotonic scheduling ____________ |
| A. | shorter duration job has higher priority |
| B. | longer duration job has higher priority |
| C. | priority does not depend on the duration of the job |
| D. | none of the mentioned |
| Answer» A. shorter duration job has higher priority | |
| 96. |
In which scheduling certain amount of CPU time is allocated to each process? |
| A. | earliest deadline first scheduling |
| B. | proportional share scheduling |
| C. | equal share scheduling |
| D. | none of the mentioned |
| Answer» B. proportional share scheduling | |
| 97. |
Time duration required for scheduling dispatcher to stop one process and start another is known as ____________ |
| A. | process latency |
| B. | dispatch latency |
| C. | execution latency |
| D. | interrupt latency |
| Answer» B. dispatch latency | |
| 98. |
Time required to synchronous switch from the context of one thread to the context of another thread is called? |
| A. | threads fly-back time |
| B. | jitter |
| C. | context switch time |
| D. | none of the mentioned |
| Answer» C. context switch time | |
| 99. |
Which one of the following is a real time operating system? |
| A. | RTLinux |
| B. | VxWorks |
| C. | Windows CE |
| D. | All of the mentioned |
| Answer» D. All of the mentioned | |
| 100. |
VxWorks is centered around ___________ |
| A. | wind microkernel |
| B. | linux kernel |
| C. | unix kernel |
| D. | none of the mentioned |
| Answer» A. wind microkernel | |
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