McqMate
These multiple-choice questions (MCQs) are designed to enhance your knowledge and understanding in the following areas: Computer Science Engineering (CSE) .
| 51. |
The PCI follows a set of standards primarily used in _____ PC’s. |
| A. | intel |
| B. | motorola |
| C. | sun |
| D. | IBM |
| Answer» D. IBM | |
| 52. |
How may standard levels of interrupts are provided on the 8-bit ISA bus (XT-class computer)? |
| A. | 4 |
| B. | 8 |
| C. | 12 |
| D. | 16 |
| Answer» B. 8 | |
| 53. |
The acronym HDI stands for: The acronym HDI stands for: |
| A. | Half duplex interface |
| B. | Hard disk |
| C. | Hard disk interface |
| D. | Help desk interference |
| Answer» C. Hard disk interface | |
| 54. |
Bus which used to connect the monitor to the CPU is |
| A. | PCI bus |
| B. | SCSI bus |
| C. | memory bus |
| D. | rambus |
| Answer» B. SCSI bus | |
| 55. |
Bus which is used to connect Macintosh keyboards and mouse is |
| A. | USB |
| B. | FireWire |
| C. | SCSI |
| D. | ISA |
| Answer» A. USB | |
| 56. |
The device which starts data transfer is called __________ |
| A. | Master |
| B. | Transactor |
| C. | Distributor |
| D. | Initiator |
| Answer» D. Initiator | |
| 57. |
The method which offers higher speeds of I/O transfers is ___________ |
| A. | Memory mapping |
| B. | Interrupts |
| C. | Program-controlled I/O |
| D. | DMA |
| Answer» D. DMA | |
| 58. |
The asynchronous BUS mode of transmission allows for a faster mode of data transfer. |
| A. | true |
| B. | false |
| Answer» B. false | |
| 59. |
______ is used as an intermediate to extend the processor BUS. |
| A. | Bridge |
| B. | Router |
| C. | Gateway |
| D. | Connector |
| Answer» A. Bridge | |
| 60. |
________ is an extension of the processor BUS. |
| A. | SCSI BUS |
| B. | USB |
| C. | PCI BUS |
| D. | None of the mentioned |
| Answer» C. PCI BUS | |
| 61. |
The system developed by IBM with ISA architecture is ______ |
| A. | SPARK |
| B. | SUN-SPARK |
| C. | PC-AT |
| D. | None of the mentioned |
| Answer» C. PC-AT | |
| 62. |
The best mode of connection between devices which need to send or receive large amounts of data over a short distance is _____ |
| A. | Bus |
| B. | Serial Port |
| C. | Parallel port |
| D. | Isochronous port |
| Answer» C. Parallel port | |
| 63. |
The device which is allowed to initiate data transfers on the BUS at any time is called _____ |
| A. | Bus Master |
| B. | Processor |
| C. | Controller |
| D. | BUS arbitrator |
| Answer» A. Bus Master | |
| 64. |
The method of synchronising the processor with the I/O device in which the device sends a signal when it is ready is? |
| A. | Signal handling |
| B. | Exception |
| C. | Interrupts |
| D. | DMA |
| Answer» C. Interrupts | |
| 65. |
The PCI BUS supports _____ address space/s. |
| A. | I/O |
| B. | Memory |
| C. | Configuration |
| D. | All of the mentioned |
| Answer» D. All of the mentioned | |
| 66. |
The _________ present a uniform device-access interface to the I/O subsystem, much as system calls provide a standard interface between the application and the operating system. |
| A. | Devices |
| B. | Buses |
| C. | Device drivers |
| D. | I/O systems |
| Answer» C. Device drivers | |
| 67. |
An I/O port typically consists of four registers status, control, ________ and ________ registers. |
| A. | system in, system out |
| B. | data in, data out |
| C. | flow in, flow out |
| D. | input, output |
| Answer» B. data in, data out | |
| 68. |
The CPU hardware has a wire called __________ that the CPU senses after executing every instruction. |
| A. | interrupt request line |
| B. | interrupt bus |
| C. | interrupt receive line |
| D. | interrupt sense line |
| Answer» A. interrupt request line | |
| 69. |
The _________ determines the cause of the interrupt, performs the necessary processing and executes a return from the interrupt instruction to return the CPU to the execution state prior to the interrupt. |
| A. | interrupt request line |
| B. | device driver |
| C. | interrupt handler |
| D. | All of Above |
| Answer» C. interrupt handler | |
| 70. |
The usual BUS structure used to connect the I/O devices is ___________ |
| A. | Star BUS structure |
| B. | Multiple BUS structure |
| C. | Single BUS structure |
| D. | Node to Node BUS structure |
| Answer» C. Single BUS structure | |
| 71. |
The method of accessing the I/O devices by repeatedly checking the status flags is ___________ |
| A. | Memory-mapped I/O |
| B. | Program-controlled I/O |
| C. | I/O mapped |
| D. | None of the mentioned |
| Answer» B. Program-controlled I/O | |
| 72. |
The classification of BUSes into synchronous and asynchronous is based on __________ |
| A. | The devices connected to them |
| B. | The type of data transfer |
| C. | The Timing of data transfers |
| D. | None of the mentioned |
| Answer» C. The Timing of data transfers | |
| 73. |
In synchronous BUS, the devices get the timing signals from __________ |
| A. | Timing generator in the device |
| B. | A common clock line |
| C. | The Timing of data transfers |
| D. | None of the mentioned |
| Answer» B. A common clock line | |
| 74. |
The asynchronous BUS mode of transmission allows for a faster mode of data transfer. |
| A. | true |
| B. | false |
| Answer» B. false | |
| 75. |
The use of spooler programs or _______ Hardware allows PC operators to do the processing work at the same time a printing operation is in progress. |
| A. | Register |
| B. | memory |
| C. | Buffer |
| D. | Cpu |
| Answer» B. memory | |
| 76. |
What is the full form of ISA? |
| A. | Industry Standard Architecture |
| B. | International American Standard |
| C. | International Standard Architecture |
| D. | None of the mentioned |
| Answer» A. Industry Standard Architecture | |
| 77. |
The disadvantage of using a parallel mode of communication is ______ |
| A. | All of the mentioned |
| B. | Leads to erroneous data transfer |
| C. | Security of data |
| D. | It is costly |
| Answer» D. It is costly | |
| 78. |
The transformation between the Parallel and serial ports is done with the help of ______ |
| A. | Flip flops |
| B. | Logic circuits |
| C. | Shift registers |
| D. | None of the mentioned |
| Answer» C. Shift registers | |
| 79. |
What WLAN device provides communications management services to wireless workstations? |
| A. | Access Point |
| B. | Antenna |
| C. | Network Adaptor |
| D. | Repeater |
| Answer» A. Access Point | |
| 80. |
RS-232, RS-449, RS-530, V-24, and X-21 are examples of? |
| A. | standards for various types of transmission channels. |
| B. | standards for interfaces between terminals and modems. |
| C. | two methods of error detection and correction |
| D. | standards for end-to-end performance of data communication systems. |
| Answer» B. standards for interfaces between terminals and modems. | |
| 81. |
Many cables have “RS-232” connectors with some wires crossed or connected to each other because…. |
| A. | there are various RS-232 standards. |
| B. | asynchronous modem reverses the direction of transmitted and received data from the standard. |
| C. | accept commands from the terminals Via Rs-232 interface. |
| D. | many computers and peripherals use RS-232 serial interfaces, but not as DTE-to-DCE |
| Answer» D. many computers and peripherals use RS-232 serial interfaces, but not as DTE-to-DCE | |
| 82. |
Which protocol standard of serial communication specify the bi-directional and half-duplex form of data transmission by allowing various numbers of drivers and receivers in bus configuration? |
| A. | RS232 |
| B. | RS2485 |
| C. | RS422 |
| D. | RS423 |
| Answer» B. RS2485 | |
| 83. |
What is the maximum device handling capacity of serial standard protocol RS485 in terms of drivers and receivers on a single line? |
| A. | 8 |
| B. | 10 |
| C. | 16 |
| D. | 32 |
| Answer» D. 32 | |
| 84. |
The main importance of ARM micro-processors is providing operation with ______ |
| A. | Low cost and low power consumption |
| B. | Higher degree of multi-tasking |
| C. | Lower error or glitches |
| D. | Efficient memory management |
| Answer» A. Low cost and low power consumption | |
| 85. |
The address system supported by ARM systems is/are ___________ |
| A. | Little Endian |
| B. | Big Endian |
| C. | X-Little Endian |
| D. | Both Little & Big Endian |
| Answer» D. Both Little & Big Endian | |
| 86. |
Which of the following is the type of SPI controller? |
| A. | Queued SPI |
| B. | Microwire |
| C. | Microwire/plus |
| D. | Quad SPI |
| Answer» A. Queued SPI | |
| 87. |
How buffers are enabled in the parallel ports? |
| A. | by the data register |
| B. | by data direction register |
| C. | by individual control register |
| D. | by data and individual control register |
| Answer» B. by data direction register | |
| 88. |
Which peripheral port provides the FASTEST throughput to laser printers? |
| A. | RS-232 |
| B. | SCSI |
| C. | Parallel |
| D. | Serial |
| Answer» C. Parallel | |
| 89. |
Advantages of SPI are….. |
| A. | It\s faster than asynchronous serial. |
| B. | The receive hardware can be a simple shift register. |
| C. | It supports multiple slaves. |
| D. | All of Above |
| Answer» D. All of Above | |
| 90. |
In a safety critical system, incorrect operation ____________ |
| A. | does not affect much |
| B. | causes minor problems |
| C. | causes major and serious problems |
| D. | none of the mentioned |
| Answer» C. causes major and serious problems | |
| 91. |
Antilock brake systems, flight management systems, pacemakers are examples of ____________ |
| A. | safety critical system |
| B. | hard real time system |
| C. | soft real time system |
| D. | safety critical system and hard real time system |
| Answer» D. safety critical system and hard real time system | |
| 92. |
Some of the properties of real time systems include ____________ |
| A. | single purpose |
| B. | inexpensively mass produced |
| C. | small size |
| D. | all of the mentioned |
| Answer» D. all of the mentioned | |
| 93. |
The technique in which the CPU generates physical addresses directly is known as ____________ |
| A. | relocation register method |
| B. | real addressing |
| C. | virtual addressing |
| D. | none of the mentioned |
| Answer» B. real addressing | |
| 94. |
Hard real time operating system has ______________ jitter than a soft real time operating system. |
| A. | less |
| B. | more |
| C. | equal |
| D. | none of the mentioned |
| Answer» A. less | |
| 95. |
In rate monotonic scheduling ____________ |
| A. | shorter duration job has higher priority |
| B. | longer duration job has higher priority |
| C. | priority does not depend on the duration of the job |
| D. | none of the mentioned |
| Answer» A. shorter duration job has higher priority | |
| 96. |
In which scheduling certain amount of CPU time is allocated to each process? |
| A. | earliest deadline first scheduling |
| B. | proportional share scheduling |
| C. | equal share scheduling |
| D. | none of the mentioned |
| Answer» B. proportional share scheduling | |
| 97. |
Time duration required for scheduling dispatcher to stop one process and start another is known as ____________ |
| A. | process latency |
| B. | dispatch latency |
| C. | execution latency |
| D. | interrupt latency |
| Answer» B. dispatch latency | |
| 98. |
Time required to synchronous switch from the context of one thread to the context of another thread is called? |
| A. | threads fly-back time |
| B. | jitter |
| C. | context switch time |
| D. | none of the mentioned |
| Answer» C. context switch time | |
| 99. |
Which one of the following is a real time operating system? |
| A. | RTLinux |
| B. | VxWorks |
| C. | Windows CE |
| D. | All of the mentioned |
| Answer» D. All of the mentioned | |
| 100. |
VxWorks is centered around ___________ |
| A. | wind microkernel |
| B. | linux kernel |
| C. | unix kernel |
| D. | none of the mentioned |
| Answer» A. wind microkernel | |
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