Chapter: Multi-core Processors

A collection of lines that connects several devices is called ______________

A. bus
B. peripheral connection wires
C. Both a and b
D. internal wires
Answer» A. bus

PC Program Counter is also called ____________

A. instruction pointer
B. memory pointer
C. data counter
D. file pointer
Answer» A. instruction pointer

Which MIMD systems are best scalable with respect to the number of processors?

A. Distributed memory computers
B. ccNUMA systems
C. nccNUMA systems
D. Symmetric multiprocessors
Answer» A. Distributed memory computers

Cache coherence: For which shared (virtual) memory systems is the snooping protocol suited?

A. Crossbar connected systems
B. Systems with hypercube network
C. Systems with butterfly network
D. Bus based systems
Answer» D. Bus based systems

The idea of cache memory is based ______

A. on the property of locality of reference
B. on the heuristic 90-10 rule
C. on the fact that references generally tend to cluster
D. all of the above
Answer» A. on the property of locality of reference

When number of switch ports is equal to or larger than number of devices, this simple network is referred to as ______________

A. Crossbar
B. Crossbar switch
C. Switching
D. Both a and b
Answer» D. Both a and b

A remote node is being node which has a copy of a ______________

A. Home block
B. Guest block
C. Remote block
D. Cache block
Answer» D. Cache block

A pipeline is like _______________

A. an automobile assembly line
B. house pipeline
C. both a and b
D. a gas line
Answer» A. an automobile assembly line

Which cache miss does not occur in case of a fully associative cache?

A. Conflict miss
B. Capacity miss
C. Compulsory miss
D. Cold start miss
Answer» A. Conflict miss

Bus switches are present in ____________

A. bus window technique
B. crossbar switching
C. linked input/output
D. shared bus
Answer» B. crossbar switching

Systems that do not have parallel processing capabilities are ______________

Answer» A. SISD

Parallel programs: Which speedup could be achieved according to Amdahl´s law for infinite number of processors if 5% of a program is sequential and the remaining part is ideally parallel?

A. 10
B. 20
C. 30
D. 40
Answer» B. 20

SIMD represents an organization that ______________

A. Includes many processing units under the supervision of a common control unit
B. vector supercomputer and MIMD systems
C. logic behind pipelining an instruction as observe
D. receive an instruction from the controlling unit
Answer» A. Includes many processing units under the supervision of a common control unit

Cache memory works on the principle of ____________

A. communication links
B. Locality of reference
C. Bisection bandwidth
D. average access time
Answer» B. Locality of reference

In shared bus architecture, the required processor(s) to perform a bus cycle, for fetching data or instructions is ________________

A. One Processor
B. Two Processor
C. Multi-Processor
D. None of the above
Answer» A. One Processor

Alternative way of a snooping-based coherence protocol, is called a ____________

A. Write invalidate protocol
B. Snooping protocol
C. Directory protocol
D. Write update protocol
Answer» C. Directory protocol

If no node having a copy of a cache block, this technique is known as ______

A. Cached
B. Un-cached
C. Shared data
D. Valid data
Answer» B. Un-cached

Requesting node sending the requested data starting from the memory, and the requestor which has made the only sharing node, known as ________.

A. Read miss
B. Write miss
C. Invalidate
D. Fetch
Answer» A. Read miss

A processor performing fetch or decoding of different instruction during the execution of another instruction is called ______.

A. Direct interconnects
B. Indirect interconnects
C. Pipe-lining
D. Uniform Memory Access
Answer» C. Pipe-lining

All nodes in each dimension form a linear array, in the __________.

A. Star topology
B. Ring topology
C. Connect topology
D. Mesh topology
Answer» D. Mesh topology

The concept of pipelining is most effective in improving performance if the tasks being performed in different stages :

A. require different amount of time
B. require about the same amount of time
C. require different amount of time with time difference between any two tasks being same
D. require different amount with time difference between any two tasks being different
Answer» B. require about the same amount of time

The expression 'delayed load' is used in context of

A. processor-printer communication
B. memory-monitor communication
C. pipelining
D. none of the above
Answer» C. pipelining

During the execution of the instructions, a copy of the instructions is placed in the ______ .

A. Register
C. System heap
D. Cache
Answer» D. Cache
  • Question and answers in Multi-core Processors,
  • Multi-core Processors multiple choice questions and answers,
  • Multi-core Processors Important MCQs,
  • Solved MCQs for Multi-core Processors,
  • Multi-core Processors MCQs with answers PDF download