When both inputs of SR latches are low, the latch                        

Related MCQs

• When both inputs of SR latches are high, the latch goes                        
• In a NAND based S’-R’ latch, if S’=1 & R’=1 then the state of the latch is
• A NAND based S’-R’ latch can be converted into S-R latch by placing                          
• The inputs of SR latch are                        
• The output of latches will remain in set/reset untill                        
• Why latches are called a memory devices?
• Two stable states of latches are                        
• How many types of latches are __
• When both inputs of a J-K flip-flop cycle, the output will                        
• What is an ambiguous condition in a NAND based S’-R’ latch?