When both inputs of SR latches are high, the latch goes                        

Related MCQs

• When both inputs of SR latches are low, the latch                        
• In a NAND based S’-R’ latch, if S’=1 & R’=1 then the state of the latch is
• A NAND based S’-R’ latch can be converted into S-R latch by placing                          
• The inputs of SR latch are                        
• When a high is applied to the Set line of an SR latch, then                        
• The output of latches will remain in set/reset untill                        
• Why latches are called a memory devices?
• Two stable states of latches are                        
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