McqMate
These multiple-choice questions (MCQs) are designed to enhance your knowledge and understanding in the following areas: Bachelor of Computer Applications (BCA) .
| 51. |
A k-bit field can specify any one of |
| A. | 3k registers |
| B. | 2k registers |
| C. | K2 registers |
| D. | K3 registers |
| Answer» B. 2k registers | |
| 52. |
The time interval between adjacent bits is called the |
| A. | Word-time |
| B. | Bit-time |
| C. | Turn around time |
| D. | Slice time |
| Answer» B. Bit-time | |
| 53. |
A group of bits that tell the computer to perform a specific operation is known as |
| A. | Instruction code |
| B. | Micro-operation |
| C. | Accumulator |
| D. | Register |
| Answer» A. Instruction code | |
| 54. |
The load instruction is mostly used to designate a transfer from memory to a processor register known as |
| A. | Accumulator |
| B. | Instruction Register |
| C. | Program counter |
| D. | Memory address Register |
| Answer» A. Accumulator | |
| 55. |
The communication between the components in a microcomputer takes place via the address and |
| A. | I/O bus |
| B. | Data bus |
| C. | Address bus |
| D. | Control lines |
| Answer» B. Data bus | |
| 56. |
An instruction pipeline can be implemented by means of |
| A. | LIFO buffer |
| B. | FIFO buffer |
| C. | Stack |
| D. | None of the above |
| Answer» B. FIFO buffer | |
| 57. |
Data input command is just the opposite of a |
| A. | Test command |
| B. | Control command |
| C. | Data output |
| D. | Data channel |
| Answer» C. Data output | |
| 58. |
A microprogram sequencer |
| A. | generates the address of next micro instruction to be executed. |
| B. | generates the control signals to execute a microinstruction. |
| C. | sequentially averages all microinstructions in the control memory. |
| D. | enables the efficient handling of a micro program subroutine. |
| Answer» A. generates the address of next micro instruction to be executed. | |
| 59. |
. A binary digit is called a |
| A. | Bit |
| B. | Byte |
| C. | Number |
| D. | Character |
| Answer» A. Bit | |
| 60. |
A flip-flop is a binary cell capable of storing information of |
| A. | One bit |
| B. | Byte |
| C. | Zero bit |
| D. | Eight bit |
| Answer» A. One bit | |
| 61. |
The operation executed on data stored in registers is called |
| A. | Macro-operation |
| B. | Micro-operation |
| C. | Bit-operation |
| D. | Byte-operation |
| Answer» B. Micro-operation | |
| 62. |
MRI indicates |
| A. | Memory Reference Information. |
| B. | Memory Reference Instruction. |
| C. | Memory Registers Instruction. |
| D. | Memory Register information |
| Answer» B. Memory Reference Instruction. | |
| 63. |
Self-contained sequence of instructions that performs a given computational task is called |
| A. | Function |
| B. | Procedure |
| C. | Subroutine |
| D. | Routine |
| Answer» A. Function | |
| 64. |
Microinstructions are stored in control memory groups, with each group specifying a |
| A. | Routine |
| B. | Subroutine |
| C. | Vector |
| D. | Address |
| Answer» A. Routine | |
| 65. |
An interface that provides a method for transferring binary information between internal storage and external devices is called |
| A. | I/O interface |
| B. | Input interface |
| C. | Output interface |
| D. | I/O bus |
| Answer» A. I/O interface | |
| 66. |
Status bit is also called |
| A. | Binary bit |
| B. | Flag bit |
| C. | Signed bit |
| D. | Unsigned bit |
| Answer» B. Flag bit | |
| 67. |
An address in main memory is called |
| A. | Physical address |
| B. | Logical address |
| C. | Memory address |
| D. | Word address |
| Answer» A. Physical address | |
| 68. |
If the value V(x) of the target operand is contained in the address field itself, the addressing mode is |
| A. | immediate. |
| B. | direct. |
| C. | indirect. |
| D. | implied. |
| Answer» B. direct. | |
| 69. |
can be represented in a signed magnitude format and in a 1’s complement format as |
| A. | 111011 & 100100 |
| B. | 100100 & 111011 |
| C. | 011011 & 100100 |
| D. | 100100 & 011011 |
| Answer» A. 111011 & 100100 | |
| 70. |
The instructions which copy information from one location to another either in the processor’s internal register set or in the external main memory are called |
| A. | Data transfer instructions. |
| B. | Program control instructions. |
| C. | Input-output instructions. |
| D. | Logical instructions. |
| Answer» A. Data transfer instructions. | |
| 71. |
A device/circuit that goes through a predefined sequence of states upon the application of input pulses is called |
| A. | register |
| B. | flip-flop |
| C. | transistor. |
| D. | counter. |
| Answer» D. counter. | |
| 72. |
The performance of cache memory is frequently measured in terms of a quantity called |
| A. | Miss ratio. |
| B. | Hit ratio. |
| C. | Latency ratio. |
| D. | Read ratio. |
| Answer» C. Latency ratio. | |
| 73. |
The information available in a state table may be represented graphically in a |
| A. | simple diagram. |
| B. | state diagram. |
| C. | complex diagram. |
| D. | data flow diagram. |
| Answer» B. state diagram. | |
| 74. |
Content of the program counter is added to the address part of the instruction in order to obtain the effective address is called. |
| A. | relative address mode. |
| B. | index addressing mode. |
| C. | register mode. |
| D. | implied mode. |
| Answer» A. relative address mode. | |
| 75. |
An interface that provides I/O transfer of data directly to and form the memory unit and peripheral is termed as |
| A. | DDA. |
| B. | Serial interface. |
| C. | BR. |
| D. | DMA. |
| Answer» D. DMA. | |
| 76. |
The 2s compliment form (Use 6 bit word) of the number 1010 is |
| A. | 111100. |
| B. | 110110. |
| C. | 110111. |
| D. | 1011. |
| Answer» B. 110110. | |
| 77. |
A register capable of shifting its binary information either to the right or the left is called a |
| A. | parallel register. |
| B. | serial register. |
| C. | shift register. |
| D. | storage register. |
| Answer» C. shift register. | |
| 78. |
What is the content of Stack Pointer (SP)? |
| A. | Address of the current instruction |
| B. | Address of the next instruction |
| C. | Address of the top element of the stack |
| D. | Size of the stack. |
| Answer» C. Address of the top element of the stack | |
| 79. |
Which of the following interrupt is non maskable |
| A. | INTR. |
| B. | RST 7.5. |
| C. | RST 6.5. |
| D. | TRAP. |
| Answer» D. TRAP. | |
| 80. |
Which of the following is a main memory |
| A. | Secondary memory. |
| B. | Auxiliary memory. |
| C. | Cache memory. |
| D. | Virtual memory. |
| Answer» C. Cache memory. | |
| 81. |
Which of the following are not a machine instructions |
| A. | MOV. |
| B. | ORG. |
| C. | END. |
| D. | (B) & (C) . |
| Answer» D. (B) & (C) . | |
| 82. |
In Assembly language programming, minimum number of operands required for an instruction is/are |
| A. | Zero. |
| B. | One. |
| C. | Two. |
| D. | Both (B) & (C) . |
| Answer» A. Zero. | |
| 83. |
The maximum addressing capacity of a micro processor which uses 16 bit database & 32 bit address base is |
| A. | 64 K. |
| B. | 4 GB. |
| C. | both (A) & (B) . |
| D. | None of these. |
| Answer» B. 4 GB. | |
| 84. |
The memory unit that communicates directly with the CPU is called the |
| A. | main memory |
| B. | Secondary memory |
| C. | shared memory |
| D. | auxiliary memory. |
| Answer» A. main memory | |
| 85. |
The average time required to reach a storage location in memory and obtain its contents is called |
| A. | Latency time. |
| B. | Access time. |
| C. | Turnaround time. |
| D. | Response time. |
| Answer» B. Access time. | |
| 86. |
A successive A/D converter is |
| A. | a high-speed converter. |
| B. | a low speed converter. |
| C. | a medium speed converter. |
| D. | none of these. |
| Answer» C. a medium speed converter. | |
| 87. |
When necessary, the results are transferred from the CPU to main memory by |
| A. | I/O devices. |
| B. | CPU. |
| C. | shift registers. |
| D. | none of these. |
| Answer» C. shift registers. | |
| 88. |
A combinational logic circuit which sends data coming from a single source to two or more separate destinations is |
| A. | Decoder. |
| B. | Encoder. |
| C. | Multiplexer. |
| D. | Demultiplexer. |
| Answer» D. Demultiplexer. | |
| 89. |
In which addressing mode the operand is given explicitly in the instruction |
| A. | Absolute. |
| B. | Immediate . |
| C. | Indirect. |
| D. | Direct. |
| Answer» B. Immediate . | |
| 90. |
A stack organized computer has |
| A. | Three-address Instruction. |
| B. | Two-address Instruction. |
| C. | One-address Instruction. |
| D. | Zero-address Instruction. |
| Answer» D. Zero-address Instruction. | |
| 91. |
A Program Counter contains a number 825 and address part of the instruction contains the number 24. The effective address in the relative address mode, when an instruction is read from the memory is |
| A. | 849. |
| B. | 850. |
| C. | 801. |
| D. | 802. |
| Answer» A. 849. | |
| 92. |
A page fault |
| A. | Occurs when there is an error in a specific page. |
| B. | Occurs when a program accesses a page of main memory. |
| C. | Occurs when a program accesses a page not currently in main memory. |
| D. | Occurs when a program accesses a page belonging to another program. |
| Answer» C. Occurs when a program accesses a page not currently in main memory. | |
| 93. |
The load instruction is mostly used to designate a transfer from memory to a processor register known as____. |
| A. | Accumulator |
| B. | Instruction Register |
| C. | Program counter |
| D. | Memory address Register |
| Answer» A. Accumulator | |
| 94. |
A group of bits that tell the computer to perform a specific operation is known as____. |
| A. | Instruction code |
| B. | Micro-operation |
| C. | Accumulator |
| D. | Register |
| Answer» A. Instruction code | |
| 95. |
The time interval between adjacent bits is called the_____. |
| A. | Word-time |
| B. | Bit-time |
| C. | Turn around time |
| D. | Slice time |
| Answer» B. Bit-time | |
| 96. |
A k-bit field can specify any one of_____. |
| A. | 3k registers |
| B. | 2k registers |
| C. | K2 registers |
| D. | K3 registers |
| Answer» B. 2k registers | |
| 97. |
MIMD stands for _____. |
| A. | Multiple instruction multiple data |
| B. | Multiple instruction memory data |
| C. | Memory instruction multiple data |
| D. | Multiple information memory data |
| Answer» A. Multiple instruction multiple data | |
| 98. |
Logic gates with a set of input and outputs is arrangement of______. |
| A. | Computational circuit |
| B. | Logic circuit |
| C. | Design circuits |
| D. | Register |
| Answer» A. Computational circuit | |
| 99. |
The average time required to reach a storage location in memory and obtain its contents is called_____. |
| A. | Latency time. |
| B. | Access time. |
| C. | Turnaround time. |
| D. | Response time. |
| Answer» B. Access time. | |
| 100. |
The BSA instruction is______. |
| A. | Branch and store accumulator |
| B. | Branch and save return address |
| C. | Branch and shift address |
| D. | Branch and show accumulator |
| Answer» B. Branch and save return address | |
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