High Performance Computing (HPC) solved MCQs

1 of 18

1. A CUDA program is comprised of two primary components: a host and a _____.

a. gpu??kernel

B. cpu??kernel

c. os

d. none of above

2. The kernel code is dentified by the ________qualifier with void return type

a. _host_

B. __global__??

c. _device_

d. void

3. The kernel code is only callable by the host

a. true

B. false

4. The kernel code is executable on the device and host

a. true

B. false

5. Calling a kernel is typically referred to as _________.

a. kernel thread

B. kernel initialization

c. kernel termination

d. kernel invocation

6. Host codes in a CUDA application can Initialize a device

a. true

B. false

7. Host codes in a CUDA application can Allocate GPU memory

a. true

B. false

8. Host codes in a CUDA application can not Invoke kernels

a. true

B. false

9. CUDA offers the Chevron Syntax to configure and execute a kernel.

a. true

B. false

10. the BlockPerGrid and ThreadPerBlock parameters are related to the ________ model supported by CUDA.

a. host

B. kernel

c. thread??abstraction

d. none of above

11. _________ is Callable from the device only

a. _host_

B. __global__??

c. _device_

d. none of above

12. ______ is Callable from the host

a. _host_

B. __global__??

c. _device_

d. none of above

13. ______ is Callable from the host

a. _host_

B. __global__??

c. _device_

d. none of above

14. CUDA supports ____________ in which code in a single thread is executed by all other threads.

a. tread division

B. tread termination

c. thread abstraction

d. none of above

15. In CUDA, a single invoked kernel is referred to as a _____.

a. block

B. tread

c. grid

d. none of above

16. A grid is comprised of ________ of threads.

a. block

B. bunch

c. host

d. none of above

17. A block is comprised of multiple _______.

a. treads

B. bunch

c. host

d. none of above

18. a solution of the problem in representing the parallelismin algorithm is

a. cud

B. pta

c. cda

d. cuda

19. Host codes in a CUDA application can not Reset a device

a. true

B. false

20. Host codes in a CUDA application can Transfer data to and from the device

a. true

B. false

21. Host codes in a CUDA application can not Deallocate memory on the GPU

a. true

B. false

22. Any condition that causes a processor to stall is called as _____.

a. hazard

B. page fault

c. system error

d. none of the above

23. The time lost due to branch instruction is often referred to as _____.

a. latency

B. delay

c. branch penalty

d. none of the above

24. _____ method is used in centralized systems to perform out of order execution.

a. scorecard

B. score boarding

c. optimizing

d. redundancy

25. The computer cluster architecture emerged as an alternative for ____.

a. isa

B. workstation

c. super computers

d. distributed systems

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