McqMate
These multiple-choice questions (MCQs) are designed to enhance your knowledge and understanding in the following areas: Computer Science Engineering (CSE) .
| 151. |
Which of the following is the Universal Flip-flop? |
| A. | s-r flip-flop |
| B. | j-k flip-flop |
| C. | master slave flip-flop |
| D. | d flip-flop |
| Answer» B. j-k flip-flop | |
| 152. |
How many types of triggering takes place in a flip flops? |
| A. | 3 |
| B. | 2 |
| C. | 4 |
| D. | 5 |
| Answer» A. 3 | |
| 153. |
The term synchronous means _ |
| A. | the output changes state only when any of the input is triggered |
| B. | the output changes state only when the clock input is triggered |
| C. | the output changes state only when the input is reversed |
| D. | the output changes state only when the input follows it |
| Answer» B. the output changes state only when the clock input is triggered | |
| 154. |
The S-R, J-K and D inputs are called |
| A. | asynchronous inputs |
| B. | synchronous inputs |
| C. | bidirectional inputs |
| D. | unidirectional inputs |
| Answer» B. synchronous inputs | |
| 155. |
The characteristic of J-K flip-flop is similar to |
| A. | s-r flip-flop |
| B. | d flip-flop |
| C. | t flip-flop |
| D. | gated t flip-flop |
| Answer» A. s-r flip-flop | |
| 156. |
A J-K flip-flop can be obtained from the clocked S-R flip-flop by augmenting |
| A. | two and gates |
| B. | two nand gates |
| C. | two not gates |
| D. | two or gates |
| Answer» A. two and gates | |
| 157. |
What is the significance of the J and K terminals on the J-K flip-flop? |
| A. | there is no known significance in their designations |
| B. | the j represents “jump,” which is how the q output reacts whenever the clock goes high and the j input is also high |
| C. | the letters were chosen in honour of jack kilby, the inventory of the integrated circuit |
| D. | all of the other letters of the alphabet are already in use |
| Answer» C. the letters were chosen in honour of jack kilby, the inventory of the integrated circuit | |
| 158. |
48 MHz. |
| A. | 10.24 khz |
| B. | 5 khz |
| C. | 30.24 khz |
| D. | 15 khz |
| Answer» B. 5 khz | |
| 159. |
How many flip-flops are in the 7475 IC? |
| A. | 2 |
| B. | 1 |
| C. | 4 |
| D. | 8 |
| Answer» C. 4 | |
| 160. |
In parts of the processor, adders are used to calculate |
| A. | addresses |
| B. | table indices |
| C. | increment and decrement operators |
| D. | all of the mentioned |
| Answer» D. all of the mentioned | |
| 161. |
Total number of inputs in a half adder is |
| A. | 2 |
| B. | 3 |
| C. | 4 |
| D. | 1 |
| Answer» A. 2 | |
| 162. |
In which operation carry is obtained? |
| A. | subtraction |
| B. | addition |
| C. | multiplication |
| D. | both addition and subtraction |
| Answer» B. addition | |
| 163. |
If A and B are the inputs of a half adder, the sum is given by |
| A. | a and b |
| B. | a or b |
| C. | a xor b |
| D. | a ex-nor b |
| Answer» C. a xor b | |
| 164. |
If A and B are the inputs of a half adder, the carry is given by |
| A. | a and b |
| B. | a or b |
| C. | a xor b |
| D. | a ex-nor b |
| Answer» A. a and b | |
| 165. |
Half-adders have a major limitation in that they cannot |
| A. | accept a carry bit from a present stage |
| B. | accept a carry bit from a next stage |
| C. | accept a carry bit from a previous stage |
| D. | accept a carry bit from the following stages |
| Answer» C. accept a carry bit from a previous stage | |
| 166. |
The difference between half adder and full adder is |
| A. | half adder has two inputs while full adder has four inputs |
| B. | half adder has one output while full adder has two outputs |
| C. | half adder has two inputs while full adder has three inputs |
| D. | all of the mentioned |
| Answer» C. half adder has two inputs while full adder has three inputs | |
| 167. |
If A, B and C are the inputs of a full adder then the sum is given by |
| A. | a and b and c |
| B. | a or b and c |
| C. | a xor b xor c |
| D. | a or b or c |
| Answer» C. a xor b xor c | |
| 168. |
If A, B and C are the inputs of a full adder then the carry is given by |
| A. | a and b or (a or b) and c |
| B. | a or b or (a and b) c |
| C. | (a and b) or (a and b)c |
| D. | a xor b xor (a xor b) and c |
| Answer» A. a and b or (a or b) and c | |
| 169. |
Half subtractor is used to perform subtraction of |
| A. | 2 bits |
| B. | 3 bits |
| C. | 4 bits |
| D. | 5 bits |
| Answer» A. 2 bits | |
| 170. |
For subtracting 1 from 0, we use to take a from neighbouring bits. |
| A. | carry |
| B. | borrow |
| C. | input |
| D. | output |
| Answer» B. borrow | |
| 171. |
How many outputs are required for the implementation of a subtractor? |
| A. | 1 |
| B. | 2 |
| C. | 3 |
| D. | 4 |
| Answer» B. 2 | |
| 172. |
Let the input of a subtractor is A and B then what the output will be if A = B? |
| A. | 0 |
| B. | 1 |
| C. | a |
| D. | b |
| Answer» A. 0 | |
| 173. |
Let A and B is the input of a subtractor then the output will be |
| A. | a xor b |
| B. | a and b |
| C. | a or b |
| D. | a exnor b |
| Answer» A. a xor b | |
| 174. |
Let A and B is the input of a subtractor then the borrow will be |
| A. | a and b’ |
| B. | a’ and b |
| C. | a or b |
| D. | a and b |
| Answer» B. a’ and b | |
| 175. |
What does minuend and subtrahend denotes in a subtractor? |
| A. | their corresponding bits of input |
| B. | its outputs |
| C. | its inputs |
| D. | borrow bits |
| Answer» C. its inputs | |
| 176. |
Full subtractor is used to perform subtraction of |
| A. | 2 bits |
| B. | 3 bits |
| C. | 4 bits |
| D. | 8 bits |
| Answer» B. 3 bits | |
| 177. |
The full subtractor can be implemented using |
| A. | two xor and an or gates |
| B. | two half subtractors and an or gate |
| C. | two multiplexers and an and gate |
| D. | two comparators and an and gate |
| Answer» B. two half subtractors and an or gate | |
| 178. |
The output of a subtractor is given by (if A, B and X are the inputs). |
| A. | a and b xor x |
| B. | a xor b xor x |
| C. | a or b nor x |
| D. | a nor b xor x |
| Answer» B. a xor b xor x | |
| 179. |
The output of a full subtractor is same as |
| A. | half adder |
| B. | full adder |
| C. | half subtractor |
| D. | decoder |
| Answer» B. full adder | |
| 180. |
A register is defined as |
| A. | the group of latches for storing one bit of information |
| B. | the group of latches for storing n-bit of information |
| C. | the group of flip-flops suitable for storing one bit of information |
| D. | the group of flip-flops suitable for storing binary information |
| Answer» D. the group of flip-flops suitable for storing binary information | |
| 181. |
The register is a type of |
| A. | sequential circuit |
| B. | combinational circuit |
| C. | cpu |
| D. | latches |
| Answer» A. sequential circuit | |
| 182. |
How many types of registers are? |
| A. | 2 |
| B. | 3 |
| C. | 4 |
| D. | 5 |
| Answer» C. 4 | |
| 183. |
The main difference between a register and a counter is |
| A. | a register has no specific sequence of states |
| B. | a counter has no specific sequence of states |
| C. | a register has capability to store one bit of information but counter has n-bit |
| D. | a register counts data |
| Answer» A. a register has no specific sequence of states | |
| 184. |
In D register, ‘D’ stands for |
| A. | delay |
| B. | decrement |
| C. | data |
| D. | decay |
| Answer» C. data | |
| 185. |
Registers capable of shifting in one direction is |
| A. | universal shift register |
| B. | unidirectional shift register |
| C. | unipolar shift register |
| D. | unique shift register |
| Answer» B. unidirectional shift register | |
| 186. |
A register that is used to store binary information is called |
| A. | data register |
| B. | binary register |
| C. | shift register |
| D. | d – register |
| Answer» B. binary register | |
| 187. |
A shift register is defined as |
| A. | the register capable of shifting information to another register |
| B. | the register capable of shifting information either to the right or to the left |
| C. | the register capable of shifting information to the right only |
| D. | the register capable of shifting information to the left only |
| Answer» B. the register capable of shifting information either to the right or to the left | |
| 188. |
How many methods of shifting of data are available? |
| A. | 2 |
| B. | 3 |
| C. | 4 |
| D. | 5 |
| Answer» A. 2 | |
| 189. |
In serial shifting method, data shifting occurs |
| A. | one bit at a time |
| B. | simultaneously |
| C. | two bit at a time |
| D. | four bit at a time |
| Answer» A. one bit at a time | |
| 190. |
What is a recirculating register? |
| A. | serial out connected to serial in |
| B. | all q outputs connected together |
| C. | a register that can be used over again |
| D. | parallel out connected to parallel in |
| Answer» A. serial out connected to serial in | |
| 191. |
When is it important to use a three-state buffer? |
| A. | when two or more outputs are connected to the same input |
| B. | when all outputs are normally high |
| C. | when all outputs are normally low |
| D. | when two or more outputs are connected to two or more inputs |
| Answer» A. when two or more outputs are connected to the same input | |
| 192. |
After two clock pulses, the register contains |
| A. | 10111000 |
| B. | 10110111 |
| C. | 11110000 |
| D. | 11111100 |
| Answer» D. 11111100 | |
| 193. |
How much storage capacity does each stage in a shift register represent? |
| A. | one bit |
| B. | two bits |
| C. | four bits |
| D. | eight bits |
| Answer» A. one bit | |
| 194. |
The decimal number system represents the decimal number in the form of |
| A. | hexadecimal |
| B. | binary coded |
| C. | octal |
| D. | decimal |
| Answer» B. binary coded | |
| 195. |
29 input circuit will have total of |
| A. | 32 entries |
| B. | 128 entries |
| C. | 256 entries |
| D. | 512 entries |
| Answer» D. 512 entries | |
| 196. |
BCD adder can be constructed with 3 IC packages each of |
| A. | 2 bits |
| B. | 3 bits |
| C. | 4 bits |
| D. | 5 bits |
| Answer» C. 4 bits | |
| 197. |
The output sum of two decimal digits can be represented in |
| A. | gray code |
| B. | excess-3 |
| C. | bcd |
| D. | hexadecimal |
| Answer» C. bcd | |
| 198. |
The addition of two decimal digits in BCD can be done through |
| A. | bcd adder |
| B. | full adder |
| C. | ripple carry adder |
| D. | carry look ahead |
| Answer» A. bcd adder | |
| 199. |
3 bits full adder contains |
| A. | 3 combinational inputs |
| B. | 4 combinational inputs |
| C. | 6 combinational inputs |
| D. | 8 combinational inputs |
| Answer» D. 8 combinational inputs | |
| 200. |
The simplified expression of full adder carry is |
| A. | c = xy+xz+yz |
| B. | c = xy+xz |
| C. | c = xy+yz |
| D. | c = x+y+z |
| Answer» A. c = xy+xz+yz | |
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