McqMate
These multiple-choice questions (MCQs) are designed to enhance your knowledge and understanding in the following areas: Computer Science Engineering (CSE) .
| 201. |
Complement of F’ gives back |
| A. | f’ |
| B. | f |
| C. | ff |
| D. | ff’ |
| Answer» B. f | |
| 202. |
Decimal digit in BCD can be represented by |
| A. | 1 input line |
| B. | 2 input lines |
| C. | 3 input lines |
| D. | 4 input lines |
| Answer» D. 4 input lines | |
| 203. |
The number of logic gates and the way of their interconnections can be classified as |
| A. | logical network |
| B. | system network |
| C. | circuit network |
| D. | gate network |
| Answer» A. logical network | |
| 204. |
EPROM uses an array of |
| A. | p-channel enhancement type mosfet |
| B. | n-channel enhancement type mosfet |
| C. | p-channel depletion type mosfet |
| D. | n-channel depletion type mosfet |
| Answer» B. n-channel enhancement type mosfet | |
| 205. |
The EPROM was invented by |
| A. | wen tsing chow |
| B. | dov frohman |
| C. | luis o brian |
| D. | j p longwell |
| Answer» B. dov frohman | |
| 206. |
Address decoding for dynamic memory chip control may also be used for |
| A. | chip selection and address location |
| B. | read and write control |
| C. | controlling refresh circuits |
| D. | memory mapping |
| Answer» A. chip selection and address location | |
| 207. |
Which of the following describes the action of storing a bit of data in a mask ROM? |
| A. | a 0 is stored by connecting the gate of a mos cell to the address line |
| B. | a 0 is stored in a bipolar cell by shorting the base connection to the address line |
| C. | a 1 is stored by connecting the gate of a mos cell to the address line |
| D. | a 1 is stored in a bipolar cell by opening the base connection to the address line |
| Answer» C. a 1 is stored by connecting the gate of a mos cell to the address line | |
| 208. |
The check sum method of testing a ROM |
| A. | allows data errors to be pinpointed to a specific memory location |
| B. | provides a means for locating and correcting data errors in specific memory locations |
| C. | indicates if the data in more than one memory location is incorrect |
| D. | simply indicates that the contents of the rom are incorrect |
| Answer» D. simply indicates that the contents of the rom are incorrect | |
| 209. |
The initial values in all the cells of an EPROM is |
| A. | 0 |
| B. | 1 |
| C. | both 0 and 1 |
| D. | alternate 0s and 1s |
| Answer» B. 1 | |
| 210. |
To store 0 in such a cell, the floating point must be |
| A. | reprogrammed |
| B. | restarted |
| C. | charged |
| D. | power off |
| Answer» C. charged | |
| 211. |
The major disadvantage of RAM is? |
| A. | its access speed is too slow |
| B. | its matrix size is too big |
| C. | it is volatile |
| D. | high power consumption |
| Answer» C. it is volatile | |
| 212. |
Which one of the following is used for the fabrication of MOS EPROM? |
| A. | tms 2513 |
| B. | tms 2515 |
| C. | tms 2516 |
| D. | tms 2518 |
| Answer» C. tms 2516 | |
| 213. |
How many addresses a MOS EPROM have? |
| A. | 1024 |
| B. | 512 |
| C. | 2516 |
| D. | 256 |
| Answer» C. 2516 | |
| 214. |
ROMs retain data when |
| A. | power is on |
| B. | power is off |
| C. | system is down |
| D. | all of the mentioned |
| Answer» D. all of the mentioned | |
| 215. |
When a RAM module passes the checker board test it is |
| A. | able to read and write only 0s |
| B. | faulty |
| C. | probably good |
| D. | able to read and write only 1s |
| Answer» C. probably good | |
| 216. |
What is the difference between static RAM and dynamic RAM? |
| A. | static ram must be refreshed, dynamic ram does not |
| B. | there is no difference |
| C. | dynamic ram must be refreshed, static ram does not |
| D. | sram is slower than dram |
| Answer» C. dynamic ram must be refreshed, static ram does not | |
| 217. |
How many natural states will there be in a 4-bit ripple counter? |
| A. | 4 |
| B. | 8 |
| C. | 16 |
| D. | 32 |
| Answer» C. 16 | |
| 218. |
A ripple counter’s speed is limited by the propagation delay of |
| A. | each flip-flop |
| B. | all flip-flops and gates |
| C. | the flip-flops only with gates |
| D. | only circuit gates |
| Answer» A. each flip-flop | |
| 219. |
One of the major drawbacks to the use of asynchronous counters is that |
| A. | low-frequency applications are limited because of internal propagation delays |
| B. | high-frequency applications are limited because of internal propagation delays |
| C. | asynchronous counters do not have major drawbacks and are suitable for use in high- and low-frequency counting applications |
| D. | asynchronous counters do not have propagation delays, which limits their use in high- frequency applications |
| Answer» B. high-frequency applications are limited because of internal propagation delays | |
| 220. |
Internal propagation delay of asynchronous counter is removed by |
| A. | ripple counter |
| B. | ring counter |
| C. | modulus counter |
| D. | synchronous counter |
| Answer» D. synchronous counter | |
| 221. |
How many flip-flops are required to construct a decade counter? |
| A. | 4 |
| B. | 8 |
| C. | 5 |
| D. | 10 |
| Answer» A. 4 | |
| 222. |
The terminal count of a typical modulus-10 binary counter is |
| A. | 0000 |
| B. | 1010 |
| C. | 1001 |
| D. | 1111 |
| Answer» C. 1001 | |
| 223. |
A ripple counter’s speed is limited by the propagation delay of |
| A. | each flip-flop |
| B. | all flip-flops and gates |
| C. | the flip-flops only with gates |
| D. | only circuit gates |
| Answer» A. each flip-flop | |
| 224. |
A 4-bit counter has a maximum modulus of |
| A. | 3 |
| B. | 6 |
| C. | 8 |
| D. | 16 |
| Answer» D. 16 | |
| 225. |
UP-DOWN counter is a combination of |
| A. | latches |
| B. | flip-flops |
| C. | up counter |
| D. | up counter & down counter |
| Answer» D. up counter & down counter | |
| 226. |
UP-DOWN counter is also known as |
| A. | dual counter |
| B. | multi counter |
| C. | multimode counter |
| D. | two counter |
| Answer» C. multimode counter | |
| 227. |
In an UP-counter, each flip-flop is triggered by |
| A. | the output of the next flip-flop |
| B. | the normal output of the preceding flip-flop |
| C. | the clock pulse of the previous flip-flop |
| D. | the inverted output of the preceding flip-flop |
| Answer» B. the normal output of the preceding flip-flop | |
| 228. |
In DOWN-counter, each flip-flop is triggered by |
| A. | the output of the next flip-flop |
| B. | the normal output of the preceding flip-flop |
| C. | the clock pulse of the previous flip-flop |
| D. | the inverted output of the preceding flip-flop |
| Answer» D. the inverted output of the preceding flip-flop | |
| 229. |
Binary counter that count incrementally and decrement is called |
| A. | up-down counter |
| B. | lsi counters |
| C. | down counter |
| D. | up counter |
| Answer» A. up-down counter | |
| 230. |
Once an up-/down-counter begins its count sequence, it |
| A. | starts counting |
| B. | can be reversed |
| C. | can’t be reversed |
| D. | can be altered |
| Answer» D. can be altered | |
| 231. |
In 4-bit up-down counter, how many flip-flops are required? |
| A. | 2 |
| B. | 3 |
| C. | 4 |
| D. | 5 |
| Answer» C. 4 | |
| 232. |
A modulus-10 counter must have _ |
| A. | 10 flip-flops |
| B. | 4 flip-flops |
| C. | 2 flip-flops |
| D. | synchronous clocking |
| Answer» B. 4 flip-flops | |
| 233. |
Which is not an example of a truncated modulus? |
| A. | 8 |
| B. | 9 |
| C. | 11 |
| D. | 15 |
| Answer» A. 8 | |
| 234. |
The designation means that the |
| A. | up count is active-high, the down count is active-low |
| B. | up count is active-low, the down count is active-high |
| C. | up and down counts are both active-low |
| D. | up and down counts are both active-high |
| Answer» A. up count is active-high, the down count is active-low | |
| 235. |
The full form of SIPO is |
| A. | serial-in parallel-out |
| B. | parallel-in serial-out |
| C. | serial-in serial-out |
| D. | serial-in peripheral-out |
| Answer» A. serial-in parallel-out | |
| 236. |
How can parallel data be taken out of a shift register simultaneously? |
| A. | use the q output of the first ff |
| B. | use the q output of the last ff |
| C. | tie all of the q outputs together |
| D. | use the q output of each ff |
| Answer» D. use the q output of each ff | |
| 237. |
What is meant by parallel load of a shift register? |
| A. | all ffs are preset with data |
| B. | each ff is loaded with data, one at a time |
| C. | parallel shifting of data |
| D. | all ffs are set with data |
| Answer» A. all ffs are preset with data | |
| 238. |
After three clock pulses, the register contains |
| A. | 01110 |
| B. | 00001 |
| C. | 00101 |
| D. | 00110 |
| Answer» C. 00101 | |
| 239. |
What will be the 4-bit pattern after the second clock pulse? (Right-most bit first) |
| A. | 1100 |
| B. | 0011 |
| C. | 0000 |
| D. | 1111 |
| Answer» C. 0000 | |
| 240. |
In digital logic, a counter is a device which |
| A. | counts the number of outputs |
| B. | stores the number of times a particular event or process has occurred |
| C. | stores the number of times a clock pulse rises and falls |
| D. | counts the number of inputs |
| Answer» B. stores the number of times a particular event or process has occurred | |
| 241. |
A counter circuit is usually constructed of |
| A. | a number of latches connected in cascade form |
| B. | a number of nand gates connected in cascade form |
| C. | a number of flip-flops connected in cascade |
| D. | a number of nor gates connected in cascade form |
| Answer» C. a number of flip-flops connected in cascade | |
| 242. |
How many types of the counter are there? |
| A. | 2 |
| B. | 3 |
| C. | 4 |
| D. | 5 |
| Answer» B. 3 | |
| 243. |
A decimal counter has states. |
| A. | 5 |
| B. | 10 |
| C. | 15 |
| D. | 20 |
| Answer» B. 10 | |
| 244. |
Ripple counters are also called |
| A. | ssi counters |
| B. | asynchronous counters |
| C. | synchronous counters |
| D. | vlsi counters |
| Answer» B. asynchronous counters | |
| 245. |
Synchronous counter is a type of |
| A. | ssi counters |
| B. | lsi counters |
| C. | msi counters |
| D. | vlsi counters |
| Answer» C. msi counters | |
| 246. |
Three decade counter would have |
| A. | 2 bcd counters |
| B. | 3 bcd counters |
| C. | 4 bcd counters |
| D. | 5 bcd counters |
| Answer» B. 3 bcd counters | |
| 247. |
BCD counter is also known as |
| A. | parallel counter |
| B. | decade counter |
| C. | synchronous counter |
| D. | vlsi counter |
| Answer» B. decade counter | |
| 248. |
The parallel outputs of a counter circuit represent the |
| A. | parallel data word |
| B. | clock frequency |
| C. | counter modulus |
| D. | clock count |
| Answer» D. clock count | |
| 249. |
The time from the beginning of a read cycle to the end of tACS/tAA is called as |
| A. | write enable time |
| B. | data hold |
| C. | read cycle time |
| D. | access time |
| Answer» D. access time | |
| 250. |
Why did PROM introduced? |
| A. | to increase the storage capacity |
| B. | to increase the address locations |
| C. | to provide flexibility |
| D. | to reduce the size |
| Answer» C. to provide flexibility | |
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