McqMate
| 101. |
What is hotlink protection? |
| A. | stopping other sites from displaying images |
| B. | stopping other sites from displaying videos |
| C. | stopping access of source code |
| D. | compresses an image |
| Answer» A. stopping other sites from displaying images | |
| Explanation: hotlink protection is a kind of tool. hotlink protection is related to restricting http, it stops other sites from displaying images of your webpage. we can create a list of hostnames that can access the resources of our website. | |
| 102. |
For best speed position of CSS code should be at |
| A. | at the bottom of the code |
| B. | at the middle of the code |
| C. | at the top of the code |
| D. | anywhere in the code |
| Answer» C. at the top of the code | |
| Explanation: css styling and code should be placed at the top of the code for best loading result of the webpage. javascript code should be placed at the bottom of the page for best performance and rapid loading speed of the website. | |
| 103. |
What is not the work of database optimization? |
| A. | cleaning out old tables |
| B. | creating indexes |
| C. | optimize datatype |
| D. | delete database |
| Answer» D. delete database | |
| Explanation: we store various information in the database. a database is a collection of tables that contain information. database delay takes a long waiting time, so there are various techniques for database optimization. database optimization basically optimizes data types, tables, data size. | |
| 104. |
Which of the following is the Waterfall tool? |
| A. | webpagetest.org |
| B. | dotcom-monitor |
| C. | pingdom speed test |
| D. | gtmetrix |
| Answer» A. webpagetest.org | |
| Explanation: waterfall views are useful for | |
| 105. |
Which of the following is not the layer of the OSI Model? |
| A. | transport layer |
| B. | network layer |
| C. | session layer |
| D. | atomic layer |
| Answer» D. atomic layer | |
| Explanation: osi model stands for open systems interconnection model. it is commonly used for representing various parts of network traffic. there are seven layers in the osi model, physical layer, data link layer, network layer, transport layer, session layer, presentation layer and application layer. | |
| 106. |
Which browser gives maximum parallel connections per host? |
| A. | opera 10 |
| B. | chrome 1 and 2 |
| C. | safari 3 and 4 |
| D. | firefox 3 |
| Answer» A. opera 10 | |
| Explanation: parallel downloading is very beneficial to performance. opera 10 provides the maximum parallel connections per host | |
| 107. |
Which of the following help to meet and prove real-time constraints? |
| A. | simulator |
| B. | debugger |
| C. | emulator |
| D. | compiler |
| Answer» D. compiler | |
| Explanation: there are several reasons for designing the optimization and compilers and one such is that it could help to meet and prove the real-time constraints. | |
| 108. |
Which of the following is an important ingredient of all power optimization? |
| A. | energy model |
| B. | power model |
| C. | watt model |
| D. | power compiler |
| Answer» B. power model | |
| Explanation: saving energy can be done at any stage of the embedded system development. the high-level optimization techniques can reduce power consumption and similarly compiler optimization also can reduce the power consumption and the most important thing in power optimization are the power model. | |
| 109. |
Who proposed the first power model? |
| A. | jacome |
| B. | russell |
| C. | tiwari |
| D. | russell and jacome |
| Answer» C. tiwari | |
| Explanation: tiwari proposed the first power model in the year 1974. the model includes the so-called bases and the inter-instruction instructions. base costs of the instruction correspond to the energy consumed per instruction execution when an infinite sequence of that instruction is executed. inter instruction costs model the additional energy consumed by the processor if instructions change. | |
| 110. |
Who proposed the third power model? |
| A. | tiwari |
| B. | russell |
| C. | jacome |
| D. | russell and jacome |
| Answer» D. russell and jacome | |
| Explanation: the third model was proposed by russell and jacome in the year 1998. | |
| 111. |
Which compiler is based on the precise measurements of two fixed configurations? |
| A. | first power model |
| B. | second power model |
| C. | third power model |
| D. | fourth power model |
| Answer» C. third power model | |
| Explanation: the third model was proposed by russell and jacome in the year 1998 and is based on the precise measurements of the two fixed configurations. | |
| 112. |
What does SPM stand for? |
| A. | scratch pad memories |
| B. | sensor parity machine |
| C. | scratch pad machine |
| D. | sensor parity memories |
| Answer» A. scratch pad memories | |
| Explanation: the smaller memories provide faster access and consume less energy per access and spm or scratch pad memories is a kind of small memory which access fastly and consume less energy per access and it can be exploited by the compiler. | |
| 113. |
Which model is based on precise measurements using real hardware? |
| A. | encc energy-aware compiler |
| B. | first power model |
| C. | third power model |
| D. | second power model |
| Answer» A. encc energy-aware compiler | |
| Explanation: the encc-energy aware compiler uses the energy model by steinke et al. it is based on the precise measurements of the real hardware. the power consumption of the memory, as well as the processor, is included in this model. | |
| 114. |
What is the solution to the knapsack problem? |
| A. | many-to-many mapping |
| B. | one-to-many mapping |
| C. | many-to-one mapping |
| D. | one-to-one mapping |
| Answer» D. one-to-one mapping | |
| Explanation: the knapsack problem is associated with the size constraints, that is the size of the scratch pad memories. this problem can be solved by one-to-one mapping which was presented in an integer programming model by steinke et al. | |
| 115. |
How can one compute the power consumption of the cache? |
| A. | lee power model |
| B. | first power model |
| C. | third power model |
| D. | cacti |
| Answer» D. cacti | |
| Explanation: the cacti can compute the power consumption of the cache which is proposed by wilton and jouppi in the year 1996. | |
| 116. |
In real time operating system |
| A. | all processes have the same priority |
| B. | a task must be serviced by its deadline period |
| C. | process scheduling can be done only once |
| D. | kernel is not required |
| Answer» B. a task must be serviced by its deadline period | |
| Explanation: none. | |
| 117. |
For real time operating systems, interrupt latency should be |
| A. | minimal |
| B. | maximum |
| C. | zero |
| D. | dependent on the scheduling |
| Answer» A. minimal | |
| Explanation: interrupt latency is the time duration between the generation of interrupt and execution of its service. | |
| 118. |
In rate monotonic scheduling |
| A. | shorter duration job has higher priority |
| B. | longer duration job has higher priority |
| C. | priority does not depend on the duration of the job |
| D. | none of the mentioned |
| Answer» A. shorter duration job has higher priority | |
| Explanation: none. | |
| 119. |
In which scheduling certain amount of CPU time is allocated to each process? |
| A. | earliest deadline first scheduling |
| B. | proportional share scheduling |
| C. | equal share scheduling |
| D. | none of the mentioned |
| Answer» B. proportional share scheduling | |
| Explanation: none. | |
| 120. |
The problem of priority inversion can be solved by |
| A. | priority inheritance protocol |
| B. | priority inversion protocol |
| C. | both priority inheritance and inversion protocol |
| D. | none of the mentioned |
| Answer» A. priority inheritance protocol | |
| Explanation: none. | |
| 121. |
Time duration required for scheduling dispatcher to stop one process and start another is known as |
| A. | process latency |
| B. | dispatch latency |
| C. | execution latency |
| D. | interrupt latency |
| Answer» B. dispatch latency | |
| Explanation: none. | |
| 122. |
Which one of the following is a real time operating system? |
| A. | rtlinux |
| B. | vxworks |
| C. | windows ce |
| D. | all of the mentioned |
| Answer» D. all of the mentioned | |
| Explanation: none. | |
| 123. |
VxWorks is centered around |
| A. | wind microkernel |
| B. | linux kernel |
| C. | unix kernel |
| D. | none of the mentioned |
| Answer» A. wind microkernel | |
| Explanation: none. | |
| 124. |
Identify the standard software components that can be reused? |
| A. | application manager |
| B. | operating system |
| C. | application software |
| D. | memory |
| Answer» B. operating system | |
| Explanation: there are certain software components that can be reused in an embedded system design. these are the operating systems, real-time databases and some other forms of middleware. | |
| 125. |
What does WCTE stand for? |
| A. | wait case execution time |
| B. | wait case encoder time |
| C. | worst case execution time |
| D. | worst code execution time |
| Answer» C. worst case execution time | |
| Explanation: the wcte is the worst case execution time which is an upper bound on the execution times of task. it can be computed for certain programs like while loops, programs without recursion, iteration count etc. | |
| 126. |
For which of the following WCET can be computed? |
| A. | c program |
| B. | assembly language |
| C. | vhdl |
| D. | program without recursion |
| Answer» D. program without recursion | |
| Explanation: the wcet computing is a difficult task for assembly language and for computing wcte for any high-level language without the knowledge of the generated assembly code is impossible. | |
| 127. |
The WCET of which component can be computed if the task is mapped to hardware? |
| A. | hardware |
| B. | task |
| C. | both task and hardware |
| D. | application manager |
| Answer» A. hardware | |
| Explanation: the worst case execution time of the hardware can be computed if the task is mapped to the hardware which in turn requires the synthesis of the hardware. | |
| 128. |
Which estimation approach is used by Jha and Dutt for hardware? |
| A. | accurate cost and performance value |
| B. | estimated cost and performance value |
| C. | performance value |
| D. | accurate cost |
| Answer» B. estimated cost and performance value | |
| Explanation: there are different estimation techniques used. one such is the estimated cost and performance value which is proposed by jha and dutt for hardware. the | |
| 129. |
Which estimate approach is more precise? |
| A. | estimated cost and performance value |
| B. | accurate cost and performance value |
| C. | performance value and execution time |
| D. | estimated cost |
| Answer» B. accurate cost and performance value | |
| Explanation: the accurate cost and performance value is possible if interfaces to software synthesis tools and hardware synthesis tools exist and is more precise than any other methods. | |
| 130. |
Which estimate approach takes more time to consume? |
| A. | accurate value |
| B. | estimated value |
| C. | accurate cost and performance value |
| D. | estimated cost and performance value |
| Answer» C. accurate cost and performance value | |
| Explanation: the accurate cost and the performance value method is time-consuming but the other estimating approaches are less time consuming. | |
| 131. |
Which estimation technique can be used if interfaces to software synthesis tools and hardware synthesis tools exist? |
| A. | performance value |
| B. | estimated cost |
| C. | estimated cost and performance value |
| D. | accurate cost and performance value |
| Answer» D. accurate cost and performance value | |
| Explanation: the accurate cost and performance value is possible if interfaces to software synthesis tools and hardware synthesis tools exist. | |
| 132. |
Which of the following is the base for scheduling algorithm? |
| A. | wcet |
| B. | time |
| C. | execution time |
| D. | address accessing time |
| Answer» A. wcet | |
| Explanation: the base for scheduling algorithm is the wcet, worst case execution time which is a bound on the execution time of tasks. such computing is undecidable in the general case, so it is decidable for certain programs only such as programs without recursion, iteration count, while loops etc. | |
| 133. |
To schedule the processes, they are considered |
| A. | infinitely long |
| B. | periodic |
| C. | heavy weight |
| D. | light weight |
| Answer» B. periodic | |
| Explanation: none. | |
| 134. |
If the period of a process is ‘p’, then what is the rate of the task? |
| A. | p2 |
| B. | 2*p |
| C. | 1/p |
| D. | p |
| Answer» C. 1/p | |
| Explanation: none. | |
| 135. |
The scheduler admits a process using |
| A. | two phase locking protocol |
| B. | admission control algorithm |
| C. | busy wait polling |
| D. | none of the mentioned |
| Answer» C. busy wait polling | |
| Explanation: none. | |
| 136. |
Rate monotonic scheduling assumes that the |
| A. | processing time of a periodic process is same for each cpu burst |
| B. | processing time of a periodic process is different for each cpu burst |
| C. | periods of all processes is the same |
| D. | none of the mentioned |
| Answer» A. processing time of a periodic process is same for each cpu burst | |
| Explanation: none. | |
| 137. |
In rate monotonic scheduling, a process with a shorter period is assigned |
| A. | a higher priority |
| B. | a lower priority |
| C. | higher & lower priority |
| D. | none of the mentioned |
| Answer» A. a higher priority | |
| Explanation: none. | |
| 138. |
Is it possible to schedule these tasks so that each meets its deadline using Rate monotonic scheduling? |
| A. | yes |
| B. | no |
| C. | maybe |
| D. | none of the mentioned |
| Answer» A. yes | |
| Explanation: none. | |
| 139. |
If a set of processes cannot be scheduled by rate monotonic scheduling algorithm, then |
| A. | they can be scheduled by edf algorithm |
| B. | they cannot be scheduled by edf algorithm |
| C. | they cannot be scheduled by any other algorithm |
| D. | none of the mentioned |
| Answer» C. they cannot be scheduled by any other algorithm | |
| Explanation: none. | |
| 140. |
A process P1 has a period of 50 and a CPU burst of t1 = 25, P2 has a period of 80 and a CPU burst of 35. Can the processes be scheduled without missing the deadlines? |
| A. | yes |
| B. | no |
| C. | maybe |
| D. | none of the mentioned |
| Answer» B. no | |
| Explanation: none. | |
| 141. |
What type of fault remains in the system for some period and then disappears? |
| A. | permanent |
| B. | transient |
| C. | intermittent |
| D. | all of the mentioned |
| Answer» B. transient | |
| Explanation: for example many faults in | |
| 142. |
Which of the following approaches are used to achieve reliable systems? |
| A. | fault prevention |
| B. | fault removal |
| C. | fault tolerance |
| D. | all of the mentioned |
| Answer» D. all of the mentioned | |
| Explanation: all the options lead to formation of a reliable system. | |
| 143. |
A system maintaining its integrity while accepting a temporary halt in its operation is said to be in a state of |
| A. | full fault tolerance |
| B. | graceful degradation |
| C. | fail soft |
| D. | fail safe |
| Answer» D. fail safe | |
| Explanation: none. | |
| 144. |
Which of the following Error Detection checks is not a part of Application detection? |
| A. | hardware checks |
| B. | timing checks |
| C. | reversal checks |
| D. | coding checks |
| Answer» A. hardware checks | |
| Explanation: hardware is a part of environment detection check. | |
| 145. |
Exception handling is a type of |
| A. | forward error recovery mechanism |
| B. | backward error recovery mechanism |
| C. | all of the mentioned |
| D. | none of the mentioned |
| Answer» A. forward error recovery mechanism | |
| Explanation: exception handling is a forward error recovery mechanism, as there is no roll back to a previous state; instead control is passed to the handler so that recovery procedures can be initiated. | |
| 146. |
Non-occurrence of improper alteration of information is known as |
| A. | available dependability |
| B. | confidential dependability |
| C. | maintainable dependability |
| D. | integral dependability |
| Answer» D. integral dependability | |
| Explanation: integrity is to keep the original content safe from alteration. | |
| 147. |
In N-version programming which is the independent generation of N, the value of N is |
| A. | greater than 1 |
| B. | less than 1 |
| C. | greater than 2 |
| D. | less than 2 |
| Answer» C. greater than 2 | |
| Explanation: n-version programming (nvp), also known as multiversion programming or multiple-version dissimilar software, is a method or process in software engineering where multiple functionally equivalent programs are independently generated from the same initial specifications. | |
| 148. |
In Log-based fault tolerance, logs of undetermined events are saved and replayed on failure. |
| A. | true |
| B. | false |
| Answer» A. true | |
| Explanation: none. | |
| 149. |
All fault-tolerant techniques rely on |
| A. | integrity |
| B. | dependability |
| C. | redundancy |
| D. | none of the mentioned |
| Answer» C. redundancy | |
| Explanation: all fault-tolerant techniques rely on extra elements introduced into the system to detect & recover from faults. | |
| 150. |
In distributed systems, a logical clock is associated with |
| A. | each instruction |
| B. | each process |
| C. | each register |
| D. | none of the mentioned |
| Answer» B. each process | |
| Explanation: none. | |
| 151. |
If timestamps of two events are same, then the events are |
| A. | concurrent |
| B. | non-concurrent |
| C. | monotonic |
| D. | non-monotonic |
| Answer» A. concurrent | |
| Explanation: none. | |
| 152. |
If a process is executing in its critical section |
| A. | any other process can also execute in its critical section |
| B. | no other process can execute in its critical section |
| C. | one more process can execute in its critical section |
| D. | none of the mentioned |
| Answer» B. no other process can execute in its critical section | |
| Explanation: none. | |
| 153. |
For proper synchronization in distributed systems |
| A. | prevention from the deadlock is must |
| B. | prevention from the starvation is must |
| C. | prevention from the deadlock & starvation is must |
| D. | none of the mentioned |
| Answer» C. prevention from the deadlock & starvation is must | |
| Explanation: none. | |
| 154. |
In the token passing approach of distributed systems, processes are organized in a ring structure |
| A. | logically |
| B. | physically |
| C. | both logically and physically |
| D. | none of the mentioned |
| Answer» A. logically | |
| Explanation: none. | |
| 155. |
In distributed systems, what will the transaction coordinator do? |
| A. | starts the execution of transaction |
| B. | breaks the transaction into number of sub transactions |
| C. | coordinates the termination of the transaction |
| D. | all of the mentioned |
| Answer» D. all of the mentioned | |
| Explanation: none. | |
| 156. |
5 CLOCK SYNCHRONISATION |
| A. | bully algorithm |
| B. | ring algorithm |
| C. | both bully and ring algorithm |
| D. | none of the mentioned |
| Answer» C. both bully and ring algorithm | |
| Explanation: none. | |
| 157. |
In distributed systems, election algorithms assumes that |
| A. | a unique priority number is associated with each active process in system |
| B. | there is no priority number associated with any process |
| C. | priority of the processes is not required |
| D. | none of the mentioned |
| Answer» A. a unique priority number is associated with each active process in system | |
| Explanation: none. | |
| 158. |
According to the ring algorithm, links between processes are |
| A. | bidirectional |
| B. | unidirectional |
| C. | both bidirectional and unidirectional |
| D. | none of the mentioned |
| Answer» B. unidirectional | |
| Explanation: none. | |
| 159. |
Which of the following works by dividing the processor’s time? |
| A. | single task operating system |
| B. | multitask operating system |
| C. | kernel |
| D. | applications |
| Answer» B. multitask operating system | |
| Explanation: the multitasking operating system works by dividing the processor’s time into different discrete time slots, that is, each application requires a defined number of time slots to complete its execution. | |
| 160. |
Which of the following decides which task can have the next time slot? |
| A. | single task operating system |
| B. | applications |
| C. | kernel |
| D. | software |
| Answer» C. kernel | |
| Explanation: the operating system kernel decides which task can have the next time slot. so instead of the task executing continuously until completion, the execution of the processor is interleaved with the other tasks. | |
| 161. |
Which of the following controls the time slicing mechanism in a multitasking operating system? |
| A. | kernel |
| B. | single tasking kernel |
| C. | multitasking kernel |
| D. | application manager |
| Answer» C. multitasking kernel | |
| Explanation: the multitasking operating | |
| 162. |
Which of the following provides a time period for the context switch? |
| A. | timer |
| B. | counter |
| C. | time slice |
| D. | time machine |
| Answer» C. time slice | |
| Explanation: the time period required for each task for execution before it is stopped and replaced during a context switch is known as the time slice. | |
| 163. |
Which of the following can periodically trigger the context switch? |
| A. | software interrupt |
| B. | hardware interrupt |
| C. | peripheral |
| D. | memory |
| Answer» B. hardware interrupt | |
| Explanation: the multitasking operating systems are associated with the multitasking kernel which controls the time slicing mechanism. the time period required for each task for execution before it is stopped and replaced during a context switch is known as the time slice. these are periodically triggered by a hardware interrupt from the system timer. | |
| 164. |
Which interrupt provides system clock in the context switching? |
| A. | software interrupt |
| B. | hardware interrupt |
| C. | peripheral |
| D. | memory |
| Answer» B. hardware interrupt | |
| Explanation: the multitasking operating systems deals with the multitasking kernel which controls the time slicing mechanism and the time period required for each task for execution before it is stopped and replaced during a context switch is known as the time slice which are periodically triggered by a hardware interrupt from the system timer. this hardware interrupt provides the system clock in which several interrupts are executed and counted before a context switch is performed. | |
| 165. |
The special tale in the multitasking operating system is also known as |
| A. | task control block |
| B. | task access block |
| C. | task address block |
| D. | task allocating block |
| Answer» A. task control block | |
| Explanation: when a context switch is | |
| 166. |
Which of the following stores all the task information that the system requires? |
| A. | task access block |
| B. | register |
| C. | accumulator |
| D. | task control block |
| Answer» D. task control block | |
| Explanation: the task control block stores all the task information that the system requires and this is done when the context switch is performed so that the currently running program is interrupted. | |
| 167. |
Which of the following contains all the task and their status? |
| A. | register |
| B. | ready list |
| C. | access list |
| D. | task list |
| Answer» B. ready list | |
| Explanation: the ‘ready’ list possesses all the information regarding a task, that is, all the task and its corresponding status which is used by the scheduler to decide which task should execute in the next time slice. | |
| 168. |
Which determines the sequence and the associated task’s priority? |
| A. | scheduling algorithm |
| B. | ready list |
| C. | task control block |
| D. | application register |
| Answer» A. scheduling algorithm | |
| Explanation: the scheduling algorithm determines the sequence and an associated task’s priority. it also determines the present status of the task. | |
| 169. |
Which can control memory usage? |
| A. | operating system |
| B. | applications |
| C. | hardware |
| D. | kernel |
| Answer» D. kernel | |
| Explanation: the kernel can control the memory usage and it can also prevent the tasks from corrupting each other. | |
| 170. |
Which can control the memory sharing between the tasks? |
| A. | kernel |
| B. | application |
| C. | software |
| D. | os |
| Answer» A. kernel | |
| Explanation: the kernel can control memory sharing between tasks which allow sharing common program modules. | |
| 171. |
Which of the following can carry information and control task? |
| A. | semaphore |
| B. | messages |
| C. | flags |
| D. | address message |
| Answer» B. messages | |
| Explanation: the messages can carry information and it can also control the task regarding the real-time operating systems. these are also known as events. | |
| 172. |
How many types of messages are associated with the real-time operating system? |
| A. | 2 |
| B. | 3 |
| C. | 4 |
| D. | 5 |
| Answer» A. 2 | |
| Explanation: there are two basic types of messages associated with the real-time operating system. these are semaphores and messages. | |
| 173. |
For real time operating systems, interrupt latency should be |
| A. | minimal |
| B. | maximum |
| C. | zero |
| D. | dependent on the scheduling |
| Answer» A. minimal | |
| Explanation: interrupt latency is the time duration between the generation of interrupt and execution of its service. | |
| 174. |
In rate monotonic scheduling |
| A. | shorter duration job has higher priority |
| B. | longer duration job has higher priority |
| C. | priority does not depend on the duration of the job |
| D. | none of the mentioned |
| Answer» A. shorter duration job has higher priority | |
| Explanation: none. | |
| 175. |
In which scheduling certain amount of CPU time is allocated to each process? |
| A. | earliest deadline first scheduling |
| B. | proportional share scheduling |
| C. | equal share scheduling |
| D. | none of the mentioned |
| Answer» B. proportional share scheduling | |
| Explanation: none. | |
| 176. |
The problem of priority inversion can be solved by |
| A. | priority inheritance protocol |
| B. | priority inversion protocol |
| C. | both priority inheritance and inversion protocol |
| D. | none of the mentioned |
| Answer» A. priority inheritance protocol | |
| Explanation: none. | |
| 177. |
Time duration required for scheduling dispatcher to stop one process and start another is known as |
| A. | process latency |
| B. | dispatch latency |
| C. | execution latency |
| D. | interrupt latency |
| Answer» B. dispatch latency | |
| Explanation: none. | |
| 178. |
Time required to synchronous switch from the context of one thread to the context of another thread is called? |
| A. | threads fly-back time |
| B. | jitter |
| C. | context switch time |
| D. | none of the mentioned |
| Answer» C. context switch time | |
| Explanation: none. | |
| 179. |
VxWorks is centered around |
| A. | wind microkernel |
| B. | linux kernel |
| C. | unix kernel |
| D. | none of the mentioned |
| Answer» A. wind microkernel | |
| Explanation: none. | |
| 180. |
Message passing system allows processes to |
| A. | communicate with one another without resorting to shared data |
| B. | communicate with one another by resorting to shared data |
| C. | share data |
| D. | name the recipient or sender of the message |
| Answer» A. communicate with one another without resorting to shared data | |
| Explanation: none. | |
| 181. |
Which of the following two operations are provided by the IPC facility? |
| A. | write & delete message |
| B. | delete & receive message |
| C. | send & delete message |
| D. | receive & send message |
| Answer» D. receive & send message | |
| Explanation: none. | |
| 182. |
Messages sent by a process |
| A. | have to be of a fixed size |
| B. | have to be a variable size |
| C. | can be fixed or variable sized |
| D. | none of the mentioned |
| Answer» C. can be fixed or variable sized | |
| Explanation: none. | |
| 183. |
The link between two processes P and Q to send and receive messages is called |
| A. | communication link |
| B. | message-passing link |
| C. | synchronization link |
| D. | all of the mentioned |
| Answer» A. communication link | |
| Explanation: none. | |
| 184. |
Which of the following are TRUE for direct communication? |
| A. | a communication link can be associated with n number of process(n = max. number of processes supported by system) |
| B. | a communication link can be associated with exactly two processes |
| C. | exactly n/2 links exist between each pair of processes(n = max. number of processes supported by system) |
| D. | exactly two link exists between each pair of processes |
| Answer» B. a communication link can be associated with exactly two processes | |
| Explanation: none. | |
| 185. |
In indirect communication between processes P and Q |
| A. | there is another process r to handle and pass on the messages between p and q |
| B. | there is another machine between the two processes to help communication |
| C. | there is a mailbox to help communication between p and q |
| D. | none of the mentioned |
| Answer» C. there is a mailbox to help communication between p and q | |
| Explanation: none. | |
| 186. |
In the non blocking send |
| A. | the sending process keeps sending until the message is received |
| B. | the sending process sends the message and resumes operation |
| C. | the sending process keeps sending until it receives a message |
| D. | none of the mentioned |
| Answer» B. the sending process sends the message and resumes operation | |
| Explanation: none. | |
| 187. |
In the Zero capacity queue |
| A. | the queue can store at least one message |
| B. | the sender blocks until the receiver receives the message |
| C. | the sender keeps sending and the messages don’t wait in the queue |
| D. | none of the mentioned |
| Answer» B. the sender blocks until the receiver receives the message | |
| Explanation: none. | |
| 188. |
The Zero Capacity queue |
| A. | is referred to as a message system with buffering |
| B. | is referred to as a message system with no buffering |
| C. | is referred to as a link |
| D. | none of the mentioned |
| Answer» B. is referred to as a message system with no buffering | |
| Explanation: none. | |
| 189. |
Bounded capacity and Unbounded capacity queues are referred to as |
| A. | programmed buffering |
| B. | automatic buffering |
| C. | user defined buffering |
| D. | no buffering |
| Answer» B. automatic buffering | |
| Explanation: none. | |
| 190. |
During the execution of the instructions, a copy of the instructions is placed in the |
| A. | register |
| B. | ram |
| C. | system heap |
| D. | cache |
| Answer» D. cache | |
| Explanation: none. | |
| 191. |
A processor performing fetch or decoding of different instruction during the execution of another instruction is called |
| A. | super-scaling |
| B. | pipe-lining |
| C. | parallel computation |
| D. | none of the mentioned |
| Answer» B. pipe-lining | |
| Explanation: pipe-lining is the process of improving the performance of the system by processing different instructions at the same time, with only one instruction performing one specific operation. | |
| 192. |
For a given FINITE number of instructions to be executed, which architecture of the processor provides for a faster execution? |
| A. | isa |
| B. | ansa |
| C. | super-scalar |
| D. | all of the mentioned |
| Answer» C. super-scalar | |
| Explanation: in super-scalar architecture, the instructions are set in groups and they’re decoded and executed together reducing the amount of time required to process them. | |
| 193. |
An optimizing Compiler does |
| A. | better compilation of the given piece of code |
| B. | takes advantage of the type of processor and reduces its process time |
| C. | does better memory management |
| D. | none of the mentioned |
| Answer» B. takes advantage of the type of processor and reduces its process time | |
| Explanation: an optimizing compiler is a compiler designed for the specific purpose of increasing the operation speed of the processor by reducing the time taken to compile the program instructions. | |
| 194. |
The ultimate goal of a compiler is to |
| A. | reduce the clock cycles for a programming task |
| B. | reduce the size of the object code |
| C. | be versatile |
| D. | be able to detect even the smallest of errors |
| Answer» A. reduce the clock cycles for a programming task | |
| Explanation: none. | |
| 195. |
SPEC stands for |
| A. | standard performance evaluation code |
| B. | system processing enhancing code |
| C. | system performance evaluation corporation |
| D. | standard processing enhancement corporation |
| Answer» C. system performance evaluation corporation | |
| Explanation: spec is a corporation that started to standardize the evaluation method of a system’s performance. | |
| 196. |
As of 2000, the reference system to find the performance of a system is |
| A. | ultra sparc 10 |
| B. | sun sparc |
| C. | sun ii |
| D. | none of the mentioned |
| Answer» A. ultra sparc 10 | |
| Explanation: in spec system of measuring a system’s performance, a system is used as a reference against which other systems are compared and performance is determined. | |
| 197. |
When Performing a looping operation, the instruction gets stored in the |
| A. | registers |
| B. | cache |
| C. | system heap |
| D. | system stack |
| Answer» B. cache | |
| Explanation: when a looping or branching operation is carried out the offset value is stored in the cache along with the data. | |
| 198. |
The average number of steps taken to execute the set of instructions can be made to be less than one by following |
| A. | isa |
| B. | pipe-lining |
| C. | super-scaling |
| D. | sequential |
| Answer» C. super-scaling | |
| Explanation: the number of steps required to execute a given set of instructions is sufficiently reduced by using super-scaling. in this method, a set of instructions are grouped together and are processed. | |
| 199. |
If a processor clock is rated as 1250 million cycles per second, then its clock period is |
| A. | 1.9 * 10-10 sec |
| B. | 1.6 * 10-9 sec |
| C. | 1.25 * 10-10 sec |
| D. | 8 * 10-10 sec |
| Answer» D. 8 * 10-10 sec | |
| Explanation: none. | |
| 200. |
If the instruction, Add R1, R2, R3 is executed in a system that is pipe-lined, then the value of S is (Where S is a term of the Basic performance equation)? |
| A. | 3 |
| B. | ~2 |
| C. | ~1 |
| D. | 6 |
| Answer» C. ~1 | |
| Explanation: s is the number of steps required to execute the instructions. | |
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