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101. |
The purpose of the microprocessor is to control |
A. | memory |
B. | switches |
C. | processing |
D. | tasks |
Answer» A. memory |
102. |
The first digital electronic computer was built in the year |
A. | 1950 |
B. | 1960 |
C. | 1940 |
D. | 1930 |
Answer» C. 1940 |
103. |
In 1960's texas institute invented |
A. | integrated circuits |
B. | microprocessor |
C. | vacuum tubes |
D. | transistors |
Answer» A. integrated circuits |
104. |
The intel 8086 microprocessor is a processor |
A. | 8 bit |
B. | 16 bit |
C. | 32 bit |
D. | 4 bit |
Answer» B. 16 bit |
105. |
The microprocessor can read/write 16 bit data from or to |
A. | memory |
B. | i /o device |
C. | processor |
D. | register |
Answer» A. memory |
106. |
In 8086 microprocessor , the address bus is bit wide |
A. | 12 bit |
B. | 10 bit |
C. | 16 bit |
D. | 20 bit |
Answer» D. 20 bit |
107. |
The work of EU is |
A. | encoding |
B. | decoding |
C. | processing |
D. | calculations |
Answer» B. decoding |
108. |
The SF is called as |
A. | service flag |
B. | sign flag |
C. | single flag |
D. | condition flag |
Answer» B. sign flag |
109. |
The OF is called as |
A. | overflow flag |
B. | overdue flag |
C. | one flag |
D. | over flag |
Answer» A. overflow flag |
110. |
The IF is called as |
A. | initial flag |
B. | indicate flag |
C. | interrupt flag |
D. | inter flag |
Answer» C. interrupt flag |
111. |
The register AX is formed by grouping |
A. | ah & al |
B. | bh & bl |
C. | ch & cl |
D. | dh & dl |
Answer» A. ah & al |
112. |
The SP is indicated by |
A. | single pointer |
B. | stack pointer |
C. | source pointer |
D. | destination pointer |
Answer» B. stack pointer |
113. |
The BP is indicated by |
A. | base pointer |
B. | binary pointer |
C. | bit pointer |
D. | digital pointer |
Answer» A. base pointer |
114. |
The SS is called as |
A. | single stack |
B. | stack segment |
C. | sequence stack . |
D. | random stack |
Answer» B. stack segment |
115. |
The index register are used to hold |
A. | memory register |
B. | offset address |
C. | segment memory |
D. | offset memory |
Answer» A. memory register |
116. |
The BIU contains FIFO register of size bytes |
A. | 8 |
B. | 6 |
C. | 4 |
D. | 12 |
Answer» B. 6 |
117. |
The BIU prefetches the instruction from memory and store them in |
A. | queue |
B. | register |
C. | memory |
D. | stack |
Answer» A. queue |
118. |
The 1 MB byte of memory can be divided into segment |
A. | 1 kbyte |
B. | 64 kbyte |
C. | 33 kbyte |
D. | 34 kbyte |
Answer» B. 64 kbyte |
119. |
The DS is called as |
A. | data segment |
B. | digital segment |
C. | divide segment |
D. | decode segment |
Answer» A. data segment |
120. |
The CS register stores instruction in code segment |
A. | stream |
B. | path |
C. | codes |
D. | stream line |
Answer» C. codes |
121. |
The IP is bits in length |
A. | 8 bits |
B. | 4 bits |
C. | 16 bits |
D. | 32 bits |
Answer» C. 16 bits |
122. |
The push source copies a word from source to |
A. | stack |
B. | memory |
C. | register |
D. | destination |
Answer» A. stack |
123. |
LDs copies to consecutive words from memory to register and |
A. | es |
B. | ds |
C. | ss |
D. | cs |
Answer» B. ds |
124. |
IMUL source is a signed |
A. | multiplication |
B. | addition |
C. | subtraction |
D. | division |
Answer» A. multiplication |
125. |
destination inverts each bit of destination |
A. | not |
B. | nor |
C. | and |
D. | or |
Answer» A. not |
126. |
Instruction providing both segment base and offset address are called |
A. | below type . |
B. | far type |
C. | low type |
D. | high type |
Answer» B. far type |
127. |
The conditional branch instruction specify for branching |
A. | conditions |
B. | instruction |
C. | address |
D. | memory |
Answer» A. conditions |
128. |
The microprocessor determines whether the specified condition exists or not by testing the |
A. | carry flag |
B. | conditional flag |
C. | common flag |
D. | sign flag |
Answer» B. conditional flag |
129. |
The LES copies to words from memory to register and |
A. | ds |
B. | cs |
C. | es |
D. | ds |
Answer» C. es |
130. |
The translates a byte from one code to another code |
A. | xlat |
B. | xchng |
C. | pop |
D. | push |
Answer» A. xlat |
131. |
The contains an offset instead of actual address |
A. | sp |
B. | ip |
C. | es |
D. | ss |
Answer» B. ip |
132. |
The 8086 fetches instruction one after another from of memory |
A. | code segment |
B. | ip |
C. | es |
D. | ss |
Answer» A. code segment |
133. |
The BIU contains FIFO register of size 6 bytes called . |
A. | queue |
B. | stack |
C. | segment |
D. | register |
Answer» A. queue |
134. |
The is required to synchronize the internal operands in the processor CLK Signal |
A. | ur signal |
B. | vcc |
C. | aie |
D. | ground |
Answer» A. ur signal |
135. |
The pin of minimum mode AD0-AD15 has address |
A. | 16 bit |
B. | 20 bit |
C. | 32 bit |
D. | 4 bit |
Answer» B. 20 bit |
136. |
The pin of minimum mode AD0- AD15 has _ data bus |
A. | 4 bit |
B. | 20 bit |
C. | 16 bit |
D. | 32 bit |
Answer» C. 16 bit |
137. |
is used to write into memory |
A. | rd |
B. | wr |
C. | rd / wr |
D. | clk |
Answer» B. wr |
138. |
The RD, WR, M/IO is the heart of control for a mode |
A. | minimum |
B. | maximum |
C. | compatibility mode |
D. | control mode |
Answer» A. minimum |
139. |
In a minimum mode there is a on the system bus |
A. | single |
B. | double |
C. | multiple |
D. | triple |
Answer» A. single |
140. |
If MN/MX is low the 8086 operates in mode |
A. | minimum |
B. | maximum |
C. | both (a) and (b) |
D. | medium |
Answer» B. maximum |
141. |
In max mode, control bus signal So,S1 and S2 are sent out in form |
A. | decoded |
B. | encoded |
C. | shared |
D. | unshared |
Answer» B. encoded |
142. |
The bus controller device decodes the signals to produce the control bus signal |
A. | internal |
B. | data |
C. | external |
D. | address |
Answer» C. external |
143. |
A Instruction at the end of interrupt service program takes the execution back to the interrupted program |
A. | forward |
B. | return |
C. | data |
D. | line |
Answer» B. return |
144. |
Primary function of memory interfacing is that the should be able to read from and write into register |
A. | multiprocessor |
B. | microprocessor |
C. | dual processor |
D. | coprocessor |
Answer» B. microprocessor |
145. |
To perform any operations, the Mp should identify the |
A. | register |
B. | memory |
C. | interface |
D. | system |
Answer» A. register |
146. |
The Microprocessor places address on the address bus |
A. | 4 bit |
B. | 8 bit |
C. | 16 bit |
D. | 32 bit |
Answer» C. 16 bit |
147. |
The Microprocessor places 16 bit address on the add lines from that address by register should be selected |
A. | address |
B. | one |
C. | two |
D. | three |
Answer» B. one |
148. |
The of the memory chip will identify and select the register for the EPROM |
A. | internal decoder |
B. | external decoder |
C. | address decoder |
D. | data decoder |
Answer» A. internal decoder |
149. |
Microprocessor provides signal like to indicate the read operatio |
A. | low |
B. | mcmw |
C. | mcmr |
D. | mcmwr |
Answer» C. mcmr |
150. |
To interface memory with the microprocessor, connect register the lines of the address bus must be added to address lines of the chip. |
A. | single |
B. | memory |
C. | multiple |
D. | triple |
Answer» B. memory |
151. |
The remaining address line of bus is decoded to generate chip select signal |
A. | data |
B. | address |
C. | control bus |
D. | both (a) and (b) |
Answer» B. address |
152. |
signal is generated by combining RD and WR signals with IO/M |
A. | control |
B. | memory |
C. | register |
D. | system |
Answer» A. control |
153. |
has certain signal requirements write into and read from its registers |
A. | memory |
B. | register |
C. | both (a) and (b) |
D. | control |
Answer» A. memory |
154. |
An is used to fetch one address |
A. | internal decoder |
B. | external decoder |
C. | encoder |
D. | register |
Answer» A. internal decoder |
155. |
The primary function of the is to accept data from I/P devices |
A. | multiprocessor |
B. | microprocessor |
C. | peripherals |
D. | interfaces |
Answer» B. microprocessor |
156. |
signal prevent the microprocessor from reading the same data more than one |
A. | pipelining |
B. | handshaking |
C. | controlling |
D. | signaling |
Answer» B. handshaking |
157. |
Bits in IRR interrupt are |
A. | reset |
B. | set |
C. | stop |
D. | start |
Answer» B. set |
158. |
The pin is used to select direct command word |
A. | a0 |
B. | d7-d6 |
C. | a12 |
D. | ad7-ad6 |
Answer» A. a0 |
159. |
CS connect the output of |
A. | encoder |
B. | decoder |
C. | slave program |
D. | buffer |
Answer» B. decoder |
160. |
8086 and 8088 contains transistors |
A. | 29000 |
B. | 24000 |
C. | 34000 |
D. | 54000 |
Answer» A. 29000 |
161. |
In 8086, Example for Non maskable interrupts are . |
A. | trap |
B. | rst6.5 |
C. | intr |
D. | rst6.6 |
Answer» A. trap |
162. |
Access time is faster for . |
A. | rom |
B. | sram |
C. | dram |
D. | eram |
Answer» B. sram |
163. |
The First Microprocessor was . |
A. | intel 4004 |
B. | 8080 |
C. | 8085 |
D. | 4008 |
Answer» A. intel 4004 |
164. |
Status register is also called as . |
A. | accumulator |
B. | stack |
C. | counter |
D. | flags |
Answer» D. flags |
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