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600+ Digital Electronics and Logic Design Solved MCQs

These multiple-choice questions (MCQs) are designed to enhance your knowledge and understanding in the following areas: Computer Science Engineering (CSE) , Electronics and Telecommunication Engineering [ENTC] .

351.

What is the minimum number of 2 input NAND gates required to implement the function F = (x'+y') (z+w)

A. 6
B. 5
C. 4
D. 3
Answer» C. 4
352.

How many truth tables can be made from one function table ?

A. one
B. two
C. three
D. any numbers
Answer» B. two
353.

What is the largest number of data inputs which a data selector with two control inputs can have ?

A. 2
B. 4
C. 8
D. 16
Answer» B. 4
354.

A combinational circuit is one in which the output depends on the

A. input combination at the time
B. input combination and the previous output
C. input combination at that time and the previous input combination
D. present output and the previous output
Answer» A. input combination at the time
355.

The function of a multiplexer is

A. to decode information
B. to select 1 out of n input data sources and to transmit it to single channel
C. to transit data on n lines
D. to perform serial to parallel conversion
Answer» B. to select 1 out of n input data sources and to transmit it to single channel
356.

For the device shown here, let all D inputs be LOW, both S inputs be HIGH, and the input be LOW. What is the status of the Y output?

A. low
B. high
C. don\t care
D. cannot be determine d
Answer» A. low
357.

Convert BCD 0001 0010 0110 to binary.

A. 1111110
B. 1111000
C. 1111101
D. 1111111
Answer» A. 1111110
358.

Convert BCD 0001 0111 to binary.

A. 10101
B. 10001
C. 10010
D. 11000
Answer» C. 10010
359.

How many 1-of-16 decoders are required for decoding a 7-bit binary number?

A. 5
B. 6
C. 7
D. 8
Answer» D. 8
360.

The implementation of simplified sum-of-products expressions may be easily implemented into actual logic circuits using all universal                 gates with little or no increase in circuit complexity. (Select the response for the blank space that will BEST make the statement true.)

A. and/or
B. nand
C. nor
D. or/and
Answer» B. nand
361.

Which of the following statements accurately represents the two BEST methods of logic circuit simplification?

A. boolean algebra and karnaugh mapping
B. karnaugh mapping and circuit waveform analysis
C. actual circuit trial and error evaluation and waveform analysis
D. boolean algebra and actual circuit trial and error evaluation
Answer» A. boolean algebra and karnaugh mapping
362.

Which of the following combinations cannot be combined into K-map groups?

A. corners in the same row
B. corners in the same column
C. diagonal corners
D. overlappin g combinati ons
Answer» C. diagonal corners
363.

As a technician you are confronted with a TTL circuit board containing dozens of IC chips. You have taken several readings at numerous IC chips, but the readings are inconclusive because of their erratic nature. Of the possible faults listed, select the one that most probably is causing the problem.

A. a defective ic chip that is drawing excessive current from the power supply
B. a solar bridge between the inputs on the first ic chip on the board
C. an open input on the first ic chip on the board
D. a defective output ic chip that has an internal open to v cc
Answer» C. an open input on the first ic chip on the board
364.

Which gate is best used as a basic comparator?

A. nor
B. or
C. exclusive-or
D. and
Answer» C. exclusive-or
365.

The device shown here is most likely a .

A. comparator
B. multiplexer
C. demultiplexe r
D. parity generator
Answer» C. demultiplexe r
366.

For the device shown here, assume the D input is LOW, both S inputs are HIGH, and the input is HIGH. What is the status of the outputs?

A. all are high.
B. all are low.
C. all but are low.
D. all but are high.
Answer» A. all are high.
367.

In VHDL, macrofunctions is/are:

A. digital circuits.
B. analog circuits.
C. a set of bit vectors.
D. preprogra mmed ttl devices.
Answer» D. preprogra mmed ttl devices.
368.

Which of the following expressions is in the product-of-sums form?

A. (a + b )(c + d )
B. (ab )(cd )
C. ab (cd )
D. ab + cd
Answer» A. (a + b )(c + d )
369.

Which of the following is an important feature of the sum-of-products form of expressions?

A. all logic circuits are reduced to nothing more than simple and and or operations.
B. the delay times are greatly reduced over other forms.
C. no signal must pass through more than two gates, not including inverters.
D. the maximum number of gates that any signal must pass through is reduced by a factor of two.
Answer» A. all logic circuits are reduced to nothing more than simple and and or operations.
370.

An output gate is connected to four input gates; the circuit does not function. Preliminary tests with the DMM indicate that the power is applied; scope tests show that the primary input gate has a pulsing signal, while the interconnecting node has no signal. The four load gates are all on different ICs. Which instrument will best help isolate the problem?

A. current tracer
B. logic probe
C. oscilloscope
D. logic analyzer
Answer» A. current tracer
371.

The binary numbers A = 1100 and B = 1001 are applied to the inputs of a comparator. What are the output levels?

A. a > b = 1, a < b = 0, a < b = 1
B. a > b = 0, a < b = 1, a = b = 0
C. a > b = 1, a < b = 0, a = b = 0
D. a > b = 0, a < b = 1, a = b = 1
Answer» C. a > b = 1, a < b = 0, a = b = 0
372.

A logic probe is placed on the output of a gate and the display indicator is dim. A pulser is used on each of the input terminals, but the output indication does not change. What is wrong?

A. the output of the gate appears to be open.
B. the dim indication on the logic probe indicates that the supply voltage is probably low.
C. the dim indication is a result of a bad ground connection on the logic probe.
D. the gate may be a tristate device.
Answer» A. the output of the gate appears to be open.
373.

Each "1" entry in a K-map square represents:

A. a high for each input truth table condition that produces a high output.
B. a high output on the truth table for all low input combination s.
C. a low output for all possible high input conditions.
D. a don\t care condition for all possible input truth table combinati ons.
Answer» A. a high for each input truth table condition that produces a high output.
374.

Looping on a K-map always results in the elimination of:

A. variables within the loop that appear only in their complemented form.
B. variables that remain unchanged within the loop.
C. variables within the loop that appear in both complemente d and uncompleme nted form.
D. variables within the loop that appear only in their uncomple mented form.
Answer» C. variables within the loop that appear in both complemente d and uncompleme nted form.
375.

What will a design engineer do after he/she is satisfied that the design will work?

A. put it in a flow chart
B. program a chip and test it
C. give the design to a technician to verify the design
D. perform a vector test
Answer» B. program a chip and test it
376.

What is the indication of a short on the input of a load gate?

A. only the output of the defective gate is affected.
B. there is a signal loss to all gates on the node.
C. the affected node will be stuck in the low state.
D. there is a signal loss to all gates on the node, and the affected node will be stuck in the low state.
Answer» D. there is a signal loss to all gates on the node, and the affected node will be stuck in the low state.
377.

In HDL, LITERALS is/are:

A. digital systems.
B. scalars.
C. binary coded decimals.
D. a numbering system.
Answer» B. scalars.
378.

Which of the following expressions is in the sum-of-products form?

A. (a + b )(c + d )
B. (ab )(cd )
C. ab (cd )
D. ab + cd
Answer» D. ab + cd
379.

The carry propagation can be expressed as .

A. cp = ab
B. cp = a + b
D.
Answer» B. cp = a + b
380.

A decoder can be used as a demultiplexer by .

A. tying all enable pins low
B. tying all data-select lines low
C. tying all data- select lines high
D. using the input lines for data selection and an enable line for data input
Answer» D. using the input lines for data selection and an enable line for data input
381.

How many 4-bit parallel adders would be required to add two binary numbers each representing decimal numbers up through 30010?

A. 1
B. 2
C. 3
D. 4
Answer» C. 3
382.

Which statement below best describes a Karnaugh map?

A. a karnaugh map can be used to replace boolean rules.
B. the karnaugh map eliminates the need for using nand and nor gates.
C. variable complements can be eliminated by using karnaugh maps.
D. karnaugh maps provide a visual approach to simplifyin g boolean expression s.
Answer» D. karnaugh maps provide a visual approach to simplifyin g boolean expression s.
383.

A certain BCD-to-decimal decoder has active-HIGH inputs and active- LOW outputs. Which output goes LOW when the inputs are 1001?

A. 0
B. 3
C. 9
D. none. all outputs are high.
Answer» C. 9
384.

A full-adder has a Cin = 0. What are the sum and the carry (Cout) when A = 1 and B = 1?

A. = 0, cout = 0
B. = 0, cout = 1
C. = 1, cout = 0
D. = 1, cout = 1
Answer» B. = 0, cout = 1
385.

When adding an even parity bit to the code 110010, the result is .

A. 1110010
B. 110010
C. 1111001
D. 1101
Answer» A. 1110010
386.

Which of the following combinations of logic gates can decode binary 1101?

A. one 4-input and gate
B. one 4-input and gate, one or gate
C. one 4-input nand gate, one inverter
D. one 4- input and gate, one inverter
Answer» D. one 4- input and gate, one inverter
387.

What is the indication of a short to ground in the output of a driving gate?

A. only the output of the defective gate is affected.
B. there is a signal loss to all load gates.
C. the node may be stuck in either the high or the low state.
D. the affected node will be stuck in the high state.
Answer» B. there is a signal loss to all load gates.
388.

How many outputs would two 8-line-to-3-line encoders, expanded to a 16-line-to-4-line encoder, have?

A. 3
B. 4
C. 5
D. 6
Answer» B. 4
389.

A half-adder does not have .

A. carry in
B. carry out
C. two inputs
D. all of the above
Answer» A. carry in
390.

A circuit that can convert one of ten numerical keys pressed on a keyboard to BCD is a .

A. priority encoder
B. decoder
C. multiplexer
D. demultiple xer
Answer» A. priority encoder
391.

The prefix on IC's indicates a broader operating temperature range, and the devices are generally used by the military.

A. 54
B. 2n
C. 74
D. ttl
Answer» A. 54
392.

When an open occurs on the input of a TTL device, the output will .

A. go low, because there is no current in an open circuit
B. react as if the open input were a high
C. go high, since full voltage appears across an open
D. still be good, if only the good inputs are used
Answer» B. react as if the open input were a high
393.

The largest truth table that can be implemented directly with an 8-line- to-1-line MUX has .

A. 3 rows
B. 4 rows
C. 8 rows
D. 16 rows
Answer» C. 8 rows
394.

Parity generation and checking is used to detect .

A. which of two numbers is greater
B. errors in binary data transmission
C. errors in arithmetic in computers
D. when a binary counter counts incorrectly
Answer» B. errors in binary data transmission
395.

Except for , STD_LOGIC may have the following values.

A. \z\
B. \u\
C. \?\
D. \l\
Answer» C. \?\
396.

A gate that could be used to compare two logic levels and provide a HIGH output if they are equal is a(n) .

A. xor gate
B. xnor gate
C. nand gate
D. nor gate
Answer» B. xnor gate
397.

VHDL is very strict in the way it allows us to assign and compare                 such as signals, variables, constants, and literals.

A. objects
B. logic_vect ors
C. designs
D. arrays
Answer» A. objects
398.

The AND-OR-INVERT gates are designed to simplify implementation of .

A. pos logic
B. demorgan\s theorem
C. nand logic
D. sop logic
Answer» B. demorgan\s theorem
399.

The output of a gate has an internal short; a current tracer will .

A. identify the defective gate
B. show whether the gate is shorted to v cc or ground
C. probably not be able to locate the problem
D. be able to identify the defective load node
Answer» A. identify the defective gate
400.

Parity generators and checkers use gates.

A. exclusive-and
B. exclusive- or/nor
C. exclusive-or
D. exclusive- nand
Answer» B. exclusive- or/nor

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