McqMate
| 301. |
How many types of PLD is? |
| A. | 2 |
| B. | 3 |
| C. | 4 |
| D. | 5 |
| Answer» A. 2 | |
| Explanation: there are two types of pld, viz., devices with fixed architecture and devices with a flexible architecture. the main categories of plds are prom, pal and pla. | |
| 302. |
PLA refers to |
| A. | programmable loaded array |
| B. | programmable array logic |
| C. | programmable logic array |
| D. | programmed array logic |
| Answer» C. programmable logic array | |
| Explanation: pla refers to programmable logic array. it is a type of pld having programmable and and or gates. | |
| 303. |
The inputs in the PLD is given through |
| A. | nand gates |
| B. | or gates |
| C. | nor gates |
| D. | and gates |
| Answer» D. and gates | |
| Explanation: the inputs in the pld is given through and gate followed by inverting & non-inverting buffer. plds are programmable logic devices consisting of logic gates, flip-flops and registers connected together on a single chip. thus, it can be categorised into prom, pal and pla. | |
| 304. |
Outputs of the AND gate in PLD is known as |
| A. | input lines |
| B. | output lines |
| C. | strobe lines |
| D. | control lines |
| Answer» B. output lines | |
| Explanation: outputs of the and gate in pld is known as output lines. | |
| 305. |
PLA contains |
| A. | and and or arrays |
| B. | nand and or arrays |
| C. | not and and arrays |
| D. | nor and or arrays |
| Answer» A. and and or arrays | |
| Explanation: programmable logic array is a type of fixed architecture logic devices with programmable and gates followed by programmable or gates. it is a kind of pld. | |
| 306. |
PLA is used to implement |
| A. | a complex sequential circuit |
| B. | a simple sequential circuit |
| C. | a complex combinational circuit |
| D. | a simple combinational circuit |
| Answer» C. a complex combinational circuit | |
| Explanation: since, pla is the combination of programmable and and or gates. so, it is used to implement complex combinational circuit. | |
| 307. |
A PLA is similar to a ROM in concept except that |
| A. | it hasn’t capability to read only |
| B. | it hasn’t capability to read or write operation |
| C. | it doesn’t provide full decoding to the variables |
| D. | it hasn’t capability to write only |
| Answer» C. it doesn’t provide full decoding to the variables | |
| Explanation: a pla is similar to a rom in concept except that it doesn’t provide full decoding to the variables and doesn’t generate all the minterms as in the rom. programmable logic array is a type of fixed architecture logic devices with programmable and gates followed by programmable or gates. it is a kind of pld. | |
| 308. |
6 PROGRAMMABLE ARRAY LOGIC |
| A. | pla |
| B. | pal |
| C. | cpld |
| D. | sld |
| Answer» B. pal | |
| Explanation: since pal consists of programmable and gates and fixed or gates and also circuitry working is less. | |
| 309. |
The complex programmable logic device contains several PLD blocks and |
| A. | a language compiler |
| B. | and/or arrays |
| C. | global interconnection matrix |
| D. | field-programmable switches |
| Answer» C. global interconnection matrix | |
| Explanation: the complex programmable logic device contains several pld blocks and a global interconnection matrix by which it communicates through several devices. it is also known as field- programmable gate arrays (fpgas). | |
| 310. |
Which type of device FPGA are? |
| A. | sld |
| B. | srom |
| C. | eprom |
| D. | pld |
| Answer» D. pld | |
| Explanation: field-programmable gate arrays (fpgas) are reprogrammable silicon chips. in contrast to processors that you find in your pc, programming an fpga rewires the chip itself to implement your functionality rather than run a software application. | |
| 311. |
The difference between a PAL & a PLA is |
| A. | pals and plas are the same thing |
| B. | the pla has a programmable or plane and a programmable and plane, while the pal only has a programmable and plane |
| C. | the pal has a programmable or plane and a programmable and plane, while the pla only has a programmable and plane |
| D. | the pal has more possible product terms than the pla |
| Answer» B. the pla has a programmable or plane and a programmable and plane, while the pal only has a programmable and plane | |
| Explanation: the main difference between a pal & pla is that pla has a programmable or plane and a programmable and plane, while the pal only has a programmable and plane and a fixed or plane. | |
| 312. |
If a PAL has been programmed once |
| A. | its logic capacity is lost |
| B. | its outputs are only active high |
| C. | its outputs are only active low |
| D. | it cannot be reprogrammed |
| Answer» D. it cannot be reprogrammed | |
| Explanation: pal only has a programmable and plane and a fixed or plane. since, pal is dynamic in nature. so, it can’t be reprogrammed. | |
| 313. |
The FPGA refers to |
| A. | first programmable gate array |
| B. | field programmable gate array |
| C. | first program gate array |
| D. | field program gate array |
| Answer» B. field programmable gate array | |
| Explanation: the fpga refers to field programmable gate array. field-programmable gate arrays (fpgas) are reprogrammable silicon chips. in contrast to processors that you find in your pc, programming an fpga rewires the chip itself to implement your functionality rather than run a software application. | |
| 314. |
The full form of VLSI is |
| A. | very long single integration |
| B. | very least scale integration |
| C. | very large scale integration |
| D. | very long scale integration |
| Answer» C. very large scale integration | |
| Explanation: the full form of vlsi is very large scale integration in which fpga is implemented. | |
| 315. |
In FPGA, vertical and horizontal directions are separated by |
| A. | a line |
| B. | a channel |
| C. | a strobe |
| D. | a flip-flop |
| Answer» B. a channel | |
| Explanation: the fpga refers to field programmable gate array. field-programmable gate arrays (fpgas) are reprogrammable silicon chips. vertical and horizontal directions is separated by a channel in an fpga which determines the location of the output. | |
| 316. |
Applications of PLAs are |
| A. | registered pals |
| B. | configurable pals |
| C. | pal programming |
| D. | all of the mentioned |
| Answer» D. all of the mentioned | |
| Explanation: applications of plas are as mentioned above and these are performed by using an extra flip- flop with pal. | |
| 317. |
PAL refers to |
| A. | programmable array loaded |
| B. | programmable logic array |
| C. | programmable array logic |
| D. | programmable and logic |
| Answer» C. programmable array logic | |
| Explanation: pal refers to programmable array logic consisting of programmable and gates and fixed or gates. | |
| 318. |
For programmable logic functions, which type of PLD should be used? |
| A. | pla |
| B. | pal |
| C. | cpld |
| D. | sld |
| Answer» B. pal | |
| Explanation: since pal consists of programmable and gates and fixed or gates and also circuitry working is less. | |
| 319. |
How many two-input AND and OR gates are required to realize Y = CD+EF+G? |
| A. | 2, 2 |
| B. | 2, 3 |
| C. | 3, 3 |
| D. | 3, 2 |
| Answer» A. 2, 2 | |
| 320. |
The flag bits in an ALU is defined as |
| A. | the total number of registers |
| B. | the status bit conditions |
| C. | the total number of control lines |
| D. | all of the mentioned |
| Answer» B. the status bit conditions | |
| 321. |
The logic circuits whose outputs at any instant of time depends only on the present input but also on the past outputs are called |
| A. | combinational circuits |
| B. | sequential circuits |
| C. | latches |
| D. | flip-flops |
| Answer» B. sequential circuits | |
| 322. |
The problem where process concurrency becomes an issue is called as |
| A. | philosophers problem |
| B. | bakery problem |
| C. | bankers problem |
| D. | reader-writer problem |
| Answer» D. reader-writer problem | |
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