McqMate
These multiple-choice questions (MCQs) are designed to enhance your knowledge and understanding in the following areas: Bachelor of Science in Computer Science (BSc CS) .
| 101. |
The port lines are connected to data lines of the _____ |
| A. | peripheral |
| B. | microprocessor |
| C. | address decoder |
| D. | data decoder |
| Answer» A. peripheral | |
| 102. |
The _________ input to 8255A is usually activated by Microprocessor in system |
| A. | clear |
| B. | reset |
| C. | ports |
| D. | address bus |
| Answer» B. reset | |
| 103. |
__________ is useful for the generation of accurate time delay |
| A. | 8254 |
| B. | 8255A |
| C. | 8237A |
| D. | 8279 |
| Answer» A. 8254 | |
| 104. |
_________ is used to refresh D-Ram and regular intervals and provide timing signals |
| A. | 8255A |
| B. | 8237A |
| C. | 8254 |
| D. | 8279 |
| Answer» C. 8254 | |
| 105. |
The 8254 contains __________ counters |
| A. | 2-16 bit |
| B. | 3-16 bit |
| C. | 2-8 bit. |
| D. | 3-8 bit |
| Answer» B. 3-16 bit | |
| 106. |
The data bus buffer is _________data line |
| A. | unidirectional |
| B. | bidirectional |
| C. | no direction |
| D. | multi direction |
| Answer» B. bidirectional | |
| 107. |
In 8254 there are ________ pins |
| A. | 20 |
| B. | 24 |
| C. | 30 |
| D. | 40 |
| Answer» B. 24 | |
| 108. |
The data lines is used to transfer _______ |
| A. | count, control and status word |
| B. | data, control and status word |
| C. | data, count |
| D. | count status word |
| Answer» A. count, control and status word | |
| 109. |
The ________ input is connected to an output of the address decoder |
| A. | address bus |
| B. | data bus |
| C. | chip select |
| D. | reset |
| Answer» C. chip select | |
| 110. |
The clock signal of frequency upto _____ is supplied to clock input |
| A. | 16 MHz |
| B. | 8 MHz |
| C. | 32 MHz |
| D. | 4 MHz |
| Answer» B. 8 MHz | |
| 111. |
The ________ input is used to enable or disable |
| A. | Clk |
| B. | out |
| C. | Reset |
| D. | gate |
| Answer» D. gate | |
| 112. |
The _______ generates output way forms on the out and output line |
| A. | Counter |
| B. | clock |
| C. | Gate |
| D. | out |
| Answer» A. Counter | |
| 113. |
The ____ is constructed for the desired mode and return into control register |
| A. | control word |
| B. | clk signal |
| C. | Gate |
| D. | reset |
| Answer» A. control word | |
| 114. |
The internal block of 8237 consists of _________ channels |
| A. | 2 |
| B. | 3 |
| C. | 4 |
| D. | 5 |
| Answer» C. 4 | |
| 115. |
The _______ allow data transfer between memory and peripherals |
| A. | DMA technique |
| B. | Microprocessor |
| C. | Register |
| D. | Decoder |
| Answer» A. DMA technique | |
| 116. |
The ________ in 8237 operates in either master or in slave mode |
| A. | microprocessor |
| B. | register |
| C. | dma controller |
| D. | decoder |
| Answer» C. dma controller | |
| 117. |
There are _____different types of interface in micro computer system |
| A. | 3 |
| B. | 4 |
| C. | 5 |
| D. | 2 |
| Answer» D. 2 | |
| 118. |
_________ is used in high speed transfer is required |
| A. | dma technique |
| B. | serial communication interface |
| C. | microprocessor |
| D. | register |
| Answer» A. dma technique | |
| 119. |
________ is used to eliminate clock signal |
| A. | synchronous |
| B. | asynchronous |
| C. | serial |
| D. | dma |
| Answer» B. asynchronous | |
| 120. |
Synchronization bit at the beginning of character is called ________ |
| A. | stop bit |
| B. | simplex |
| C. | half duplex |
| D. | start bit |
| Answer» D. start bit | |
| 121. |
Who introduced Pentium family? |
| A. | intel |
| B. | wipro |
| C. | cts |
| D. | samsung |
| Answer» A. intel | |
| 122. |
Pentium pro processor is a ______ generation of device |
| A. | first |
| B. | second |
| C. | third |
| D. | fourth |
| Answer» B. second | |
| 123. |
In which year, Pentium pro processor introduced? |
| A. | 1996 |
| B. | 1998 |
| C. | 1995 |
| D. | 1999 |
| Answer» C. 1995 | |
| 124. |
_______ has been enhanced to provide higher performance for multimedia & communication applications. |
| A. | Pentium I |
| B. | Pentium II |
| C. | Pentium processor with MMX technology |
| D. | Pentium processor with Celeron technology |
| Answer» C. Pentium processor with MMX technology | |
| 125. |
________ is used in desktop and laptop personal computers |
| A. | Pentium processor with MMX technology |
| B. | Pentium Pro Processor |
| C. | Celeron Processor |
| D. | Intel Processor |
| Answer» A. Pentium processor with MMX technology | |
| 126. |
Expansion of SPGA is _________ |
| A. | Staggered Pin Grid-Array package |
| B. | Staggered Point Grid-Array package |
| C. | Staggered Plus Grid-Array package |
| D. | Staggered per grid-Array package |
| Answer» A. Staggered Pin Grid-Array package | |
| 127. |
Pentium pro processor has _______ die |
| A. | one |
| B. | three |
| C. | two |
| D. | four |
| Answer» C. two | |
| 128. |
In Pentium-pro processor, dies are manufactured using intel ___ mm BICMOS process |
| A. | 0.25 |
| B. | 0.35 |
| C. | 0.45 |
| D. | 0.50 |
| Answer» B. 0.35 | |
| 129. |
The circuitry of the Pentium pro processor is equivalent to _______ million transistors |
| A. | 1.5 |
| B. | 2.5 |
| C. | 3.5 |
| D. | 5.5 |
| Answer» D. 5.5 | |
| 130. |
Pentium-pro processor design implements________ micro architecture |
| A. | P2 |
| B. | P4 |
| C. | P6 |
| D. | P8 |
| Answer» C. P6 | |
| 131. |
Micro architecture employs _________ execution |
| A. | static |
| B. | dynamic |
| C. | static and dynamic |
| D. | none |
| Answer» B. dynamic | |
| 132. |
________ is performed to determine the best order of for execution of instructions |
| A. | system flow analysis |
| B. | process flow analysis |
| C. | data flow analysis. |
| D. | control flow analysis |
| Answer» C. data flow analysis. | |
| 133. |
Pentium processor with MMX technology includes _____ new instructions and 4 new _______ data types |
| A. | 50 & 64 bit |
| B. | 55 & 63 bit |
| C. | 57 & 64 bit |
| D. | 51 & 61 bit |
| Answer» A. 50 & 64 bit | |
| 134. |
Pentium II processor is a ____generation |
| A. | first |
| B. | second |
| C. | third |
| D. | fourth |
| Answer» C. third | |
| 135. |
Pentium II processor was introduced in the year _______. |
| A. | 1990 |
| B. | 1995 |
| C. | 1998 |
| D. | 1992 |
| Answer» C. 1998 | |
| 136. |
________followed Celeron processor and Pentium II Xeon processor |
| A. | pentium pro processor |
| B. | pentium ii processor |
| C. | pentium iii processor |
| D. | pentium iv processor |
| Answer» B. pentium ii processor | |
| 137. |
Pentium II xeon processor offers _______ performance than the std Pentium II processor |
| A. | lower |
| B. | higher |
| C. | medium |
| D. | none |
| Answer» B. higher | |
| 138. |
Dual independent bus architecture was first introduced in the ________________ |
| A. | pentium pro processor |
| B. | pentium II processor |
| C. | pentium III processor |
| D. | pentium IV processor |
| Answer» A. pentium pro processor | |
| 139. |
How many buses provided in Pentium II processor? |
| A. | one |
| B. | two |
| C. | three |
| D. | four |
| Answer» B. two | |
| 140. |
The system bus of both Pentium pro and Pentium II processors carry ______ bytes per clock |
| A. | 4 |
| B. | 8 |
| C. | 7 |
| D. | 5 |
| Answer» B. 8 | |
| 141. |
The maximum speed of Pentium II processor is increased to _______ MHz |
| A. | 200 |
| B. | 300 |
| C. | 100 |
| D. | 500 |
| Answer» C. 100 | |
| 142. |
Backside bus between L2 cache and MPU is _____ speed |
| A. | higher |
| B. | lower |
| C. | medium |
| D. | Infinite |
| Answer» A. higher | |
| 143. |
The peak bus bandwidth of backside bus (cache bus) is ______ Mbytes/second |
| A. | 1000 |
| B. | 1600 |
| C. | 2600 |
| D. | 3400 |
| Answer» B. 1600 | |
| 144. |
ECC & FRC were first introduced in _________ |
| A. | pentium pro processor |
| B. | pentium II processor |
| C. | pentium II xeon processor |
| D. | pentium III xeon processor |
| Answer» A. pentium pro processor | |
| 145. |
Pentium III processor was introduced in _______ |
| A. | 1999 |
| B. | 2000 |
| C. | 2010 |
| D. | 2009 |
| Answer» A. 1999 | |
| 146. |
Pentium III processor is manufactured using ____ process technology |
| A. | 0.17 |
| B. | 0.16 |
| C. | 0.18 |
| D. | 0.15 |
| Answer» C. 0.18 | |
| 147. |
In Pentium III processor, the P6 micro architecture is enriched with an additional ______ instructions |
| A. | 20 |
| B. | 30 |
| C. | 40 |
| D. | 70 |
| Answer» D. 70 | |
| 148. |
The 80386 Microprocessor family is a _____ bit microprocessor |
| A. | 8 |
| B. | 16 |
| C. | 32 |
| D. | 64 |
| Answer» C. 32 | |
| 149. |
In which year, 80386 microprocessor was introduced? |
| A. | 1999 |
| B. | 1995 |
| C. | 1985 |
| D. | 1990 |
| Answer» C. 1985 | |
| 150. |
Which family was the sixth member of 8086 family of microprocessors? |
| A. | 8086 |
| B. | 8085 |
| C. | 80396 DX |
| D. | 80486 SX |
| Answer» C. 80396 DX | |
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