250+ Microprocessor and Assembly Language Programming Solved MCQs

201.

Which interrupt has the highest priority?

A. INTR
B. TRAP
C. RST6.5
D. RST6.6
Answer» C. RST6.5
202.

In 8085 name the 16 bit registers?

A. stack pointer
B. program counter
C. a & b
D. stack register
Answer» C. a & b
203.

Which of the following is hardware interrupts?

A. RST5.5, RST6.5, RST7.5 .
B. INTR, TRAP . .
C. a & b.
D. .INTR
Answer» C. a & b.
204.

What is the RST for the TRAP?

A. RST5.5
B. RST4.5
C. RST4
D. RST3
Answer» B. RST4.5
205.

What are level Triggering interrupts?

A. INTR&TRAP.
B. RST6.5&RST5.5.
C. RST7.5&RST6.5.
D. RST2.5 & RST6.2.
Answer» B. RST6.5&RST5.5.
206.

Which interrupt is not level sensitive in 8085?

A. RST6.5 is a raising edge-trigging interrupt.
B. RST7.5 is a raising edge-trigging interrupt.
C. RST5.5.
D. RST4.5.
Answer» B. RST7.5 is a raising edge-trigging interrupt.
207.

What are software interrupts?

A. RST 0-7
B. RST 5.5 - 7.5
C. INTR, TRAP
D. RST 4.4 - 6.4
Answer» A. RST 0-7
208.

Which stack is used in 8085?

A. FIFO.
B. LIFO.
C. FILO
D. LILO.
Answer» B. LIFO.
209.

Why 8085 processor is called an 8 bit processor?

A. because 8085 processor has 8 bit alu.
B. because 8085 processor has 8 bit data bus.
C. because 8085 processor has 16 bit data bus.
D. because 8085 processor has 16 bit address bus.
Answer» A. because 8085 processor has 8 bit alu.
210.

What is SIM?

A. Select Interrupt Mask .
B. Sorting Interrupt Mask.
C. Set Interrupt Mask
D. Set Integer Mask
Answer» C. Set Interrupt Mask
211.

RIM is used to check whether, the ___________.

A. write operation is done or not .
B. interrupt is Masked or not .
C. interrupt is Masked.
D. interrupt is not Masked.
Answer» B. interrupt is Masked or not .
212.

What is meant by maskable interrupts?

A. an interrupt which can never be turned off.
B. an interrupt that can be turned off by the programmer.
C. an interrupt which can never be turned on.
D. an interrupt which can never be turned on or off.
Answer» B. an interrupt that can be turned off by the programmer.
213.

In 8086, Example for Non maskable interrupts are ________.

A. trap.
B. rst6.5.
C. intr.
D. rst6.6.
Answer» A. trap.
214.

What does microprocessor speed depends on?

A. clock.
B. data bus width.
C. address bus width.
D. signal bus.
Answer» C. address bus width.
215.

______ can be used as stack .

A. ROM.
B. RAM.
C. EPROM
D. PROM
Answer» B. RAM.
216.

Which processor structure is pipelined?

A. all x80 processors.
B. all x85 processors.
C. all x86 processors.
D. all x87 processors.
Answer» C. all x86 processors.
217.

Address line for RST3 is?

A. 0020H.
B. 0028H.
C. 0018H.
D. 0019H
Answer» C. 0018H.
218.

In 8086 the overflow flag is set when _____________.

A. the sum is more than 16 bits.
B. signed numbers go out of their range after an arithmetic operation.
C. carry and sign flags are set.
D. subtraction
Answer» B. signed numbers go out of their range after an arithmetic operation.
219.

The advantage of memory mapped I/O over I/O mapped I/O is _________

A. faster.
B. many instructions supporting memory mapped I/O.
C. require a bigger address decoder.
D. all the above
Answer» D. all the above
220.

BHE of 8086 microprocessor signal is used to interface the _______.

A. even bank memory.
B. odd bank memory.
C. i/o.
D. direct memory access
Answer» B. odd bank memory.
221.

In 8086 microprocessor the following has the highest priority among all type interrupts?

A. NMI.
B. DIV 0.
C. TYPE 255.
D. OVER FLOW
Answer» A. NMI.
222.

In 8086 microprocessor one of the following statements is not true?

A. coprocessor is interfaced in max mode.
B. coprocessor is interfaced in min mode.
C. i/o can be interfaced in max / min mode.
D. supports pipelining
Answer» B. coprocessor is interfaced in min mode.
223.

8088 microprocessor differs with 8086 microprocessor in _______.

A. data width on the output.
B. address capability.
C. support of coprocessor.
D. support of MAX / MIN mode
Answer» A. data width on the output.
224.

Address line for TRAP is?

A. 0023H.
B. 0024H.
C. 0033H.
D. 0099H.
Answer» B. 0024H.
225.

Access time is faster for _________.

A. ROM.
B. SRAM.
C. DRAM.
D. ERAM
Answer» B. SRAM.
226.

In 8279 Strobed input mode, the control line goes low. The data on return lines is strobed in the ___________.

A. FIFO byte by byte.
B. FILO byte by byte.
C. LIFO byte by byte.
D. LILO byte by byte.
Answer» A. FIFO byte by byte.
227.

________ bit in ICW1 indicates whether the 8259A is cascade mode or not?

A. LTIM=0.
B. LTIM=1.
C. SNGL=0.
D. SNGL=1.
Answer» C. SNGL=0.
228.

In 8255, under the I/O mode of operation we have ___________ modes. Which mode will have the following features?

A. A 5 bit control port is available.
B. Three I/O lines are available at Port C.
C. 3, mode2.
D. 2, mode 2.
Answer» B. Three I/O lines are available at Port C.
229.

In ADC 0808 if _______ pin high enables output

A. EOC.
B. I/P0-I/P7.
C. SOC.
D. OE.
Answer» D. OE.
230.

In 8279, a scanned sensor matrix mode, if a sensor changes its state, the __________ line goes ___________ to interrupt the CPU

A. CS, high.
B. A0, high.
C. IRQ, high.
D. STB, high
Answer» C. IRQ, high.
231.

In 8279 Status Word, data is read when ________ pins are low, and write to the display RAM with ____________ are low.

A. A0, CS, RD & A0, WR, CS.
B. CS, WR, A0 & A0, CS, RD.
C. A0, RD & WR, CS.
D. CS, RD & A0, CS.
Answer» A. A0, CS, RD & A0, WR, CS.
232.

In 8279, the keyboard entries are de bounced and stored in an _________, that is further accessed by the CPU to read the key codes.

A. 8-bit FIFO.
B. 8-byte FIFO.
C. 16 byte FIFO.
D. 16 bit FIFO
Answer» B. 8-byte FIFO.
233.

The 8279 normally provides a maximum of ________ seven segment display interface with CPU.

A. 8.
B. 16.
C. 32.
D. 18.
Answer» B. 16.
234.

For the most Static RAM the write pulse width should be at least

A. 10ns.
B. 60ns.
C. 300ns.
D. 1000ns.
Answer» B. 60ns.
235.

BURST refresh in DRAM is also called as ___________.

A. concentrated refresh.
B. distributed refresh.
C. hidden refresh.
D. signal refresh
Answer» A. concentrated refresh.
236.

For the most Static RAM the maximum access time is about ____________.

A. 1ns.
B. 10ns.
C. 100ns.
D. 1000ns.
Answer» C. 100ns.
237.

Which of the following statements on DRAM are correct? Page mode read operation is faster than RAS read. RAS input remains active during column address strobe. The row and column addresses are strobed into the internal buffers using RAS and CAS inputs respectively

A. i & iii.
B. i & ii.
C. all.
D. iii.
Answer» C. all.
238.

8086 microprocessor is interfaced to 8253 a programmable interval timer. The maximum number by which the clock frequency on one of the timers is divided by ________________.

A. 2^16
B. 2^8
C. 2^10
D. 2^20
Answer» A. 2^16
239.

8086 is interfaced to two 8259s (Programmable interrupt controllers). If 8259s are in master slave configuration the number of interrupts available to the 8086 microprocessor is _____________.

A. 8.
B. 16.
C. 15.
D. 64
Answer» D. 64
240.

The First Microprocessor was__________.

A. Intel 4004
B. 8080
C. 8085
D. 4008
Answer» A. Intel 4004
241.

8085 was introduced in __________.

A. 1971
B. 1976
C. 1972
D. 1978
Answer» B. 1976
242.

In 1978 Intel introduced the 16 bit Microprocessor 8086 now called as________.

A. M6 800
B. APX 80
C. Zylog z8000
D. Intel 8086
Answer» B. APX 80
243.

Which is a 8 bit Microprocessor ?

A. Intel 4040
B. Pentium-I
C. 8088
D. Motorala MC-6801
Answer» D. Motorala MC-6801
244.

Pentium-I, Pentium-II, Pentium-III and Pentium-IV are recently introduced microprocessor by__________.

A. Motorala.
B. Intel.
C. Stephen Mors.
D. HCL.
Answer» B. Intel.
245.

The address bus flow in __________.

A. bidirection.
B. unidirection.
C. mulidirection.
D. circular.
Answer» B. unidirection.
246.

Status register is also called as ___________.

A. accumulator.
B. stack.
C. counter.
D. flags
Answer» D. flags
247.

The 8085 is based in a ________ pin DIP

A. 40.
B. 45.
C. 20.
D. 35
Answer» A. 40.
248.

The 8085 Microprocessor uses__________ V power suppl

A. .+5V.
B. -5V.
C. +12V.
D. -12V
Answer» A. .+5V.
249.

The address / data bus in 8085 is __________.

A. multiplexed.
B. demultiplexed.
C. decoded.
D. encoded
Answer» A. multiplexed.
250.

The First electronic computer was completed in __________.

A. 1946.
B. 1938.
C. 1941.
D. 1950
Answer» A. 1946.
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