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601. |
The virtual memory basically stores the next segment of data to be executed on the |
A. | secondary storage |
B. | disks |
C. | ram |
D. | rom |
Answer» A. secondary storage | |
Explanation: none. |
602. |
The associatively mapped virtual memory makes use of |
A. | tlb |
B. | page table |
C. | frame table |
D. | none of the mentioned |
Answer» A. tlb | |
Explanation: tlb stands for translation look-aside buffer. |
603. |
The main reason for the discontinuation of semi conductor based storage devices for providing large storage space is |
A. | lack of sufficient resources |
B. | high cost per bit value |
C. | lack of speed of operation |
D. | none of the mentioned |
Answer» B. high cost per bit value | |
Explanation: in the case of semi conductor based memory technology, we get speed but the increase in the integration of various devices the cost is high. |
604. |
The digital information is stored on the hard disk by |
A. | applying a suitable electric pulse |
B. | applying a suitable magnetic field |
C. | applying a suitable nuclear field |
D. | by using optic waves |
Answer» A. applying a suitable electric pulse | |
Explanation: the digital data is sorted on the magnetized discs by magnetizing the areas. |
605. |
For the synchronization of the read head, we make use of a |
A. | framing bit |
B. | synchronization bit |
C. | clock |
D. | dirty bit |
Answer» C. clock | |
Explanation: the clock makes it easy to distinguish between different values red by a head. |
606. |
One of the most widely used schemes of encoding used is |
A. | nrz-polar |
B. | rz-polar |
C. | manchester |
D. | block encoding |
Answer» C. manchester | |
Explanation: the manchester encoding used is also called as phase encoding and it is used to encode both clock and data. |
607. |
The drawback of Manchester encoding is |
A. | the cost of the encoding scheme |
B. | the speed of encoding the data |
C. | the latency offered |
D. | the low bit storage density provided |
Answer» D. the low bit storage density provided | |
Explanation: the space required to represent each bit must be large enough to accommodate two changes in magnetization. |
608. |
The read/write heads must be near to disk surfaces for better storage. |
A. | true |
B. | false |
Answer» A. true | |
Explanation: by maintaining the heads near to the surface greater bit densities can be achieved. |
609. |
pushes the heads away from the surface as they rotate at their standard rates. |
A. | magnetic tension |
B. | electric force |
C. | air pressure |
D. | none of the mentioned |
Answer» C. air pressure | |
Explanation: due to the speed of rotation of the discs air pressure develops in the hard disk. |
610. |
The air pressure can be countered by putting in the head-disc surface arrangement. |
A. | air filter |
B. | spring mechanism |
C. | coolant |
D. | none of the mentioned |
Answer» B. spring mechanism | |
Explanation: the spring mechanism |
611. |
The method of placing the heads and the discs in an air tight environment is also called as |
A. | raid arrays |
B. | atp tech |
C. | winchester technology |
D. | fleming reduction |
Answer» C. winchester technology | |
Explanation: the disks and the heads operate faster due to the absence of the dust particles. |
612. |
A hard disk with 20 surfaces will have heads. |
A. | 10 |
B. | 5 |
C. | 1 |
D. | 20 |
Answer» D. 20 | |
Explanation: each surface will have its own head to perform read/write operation. |
613. |
The set of corresponding tracks on all surfaces of a stack of disks form a |
A. | cluster |
B. | cylinder |
C. | group |
D. | set |
Answer» B. cylinder | |
Explanation: the data is stored in these sections called as cylinders. |
614. |
The data can be accessed from the disk using |
A. | surface number |
B. | sector number |
C. | track number |
D. | all of the mentioned |
Answer» D. all of the mentioned | |
Explanation: none. |
615. |
The read and write operations usually start at of the sector. |
A. | center |
B. | middle |
C. | from the last used point |
D. | boundaries |
Answer» D. boundaries | |
Explanation: the heads read and write data from the ends to the center. |
616. |
To distinguish between two sectors we make use of |
A. | inter sector gap |
B. | splitting bit |
C. | numbering bit |
D. | none of the mentioned |
Answer» A. inter sector gap | |
Explanation: this means that we leave a little gap between each sector to differentiate between them. |
617. |
The process divides the disk into sectors and tracks. |
A. | creation |
B. | initiation |
C. | formatting |
D. | modification |
Answer» C. formatting | |
Explanation: the formatting process deletes the data present and does the creation of sectors and tracks. |
618. |
The access time is composed of |
A. | seek time |
B. | rotational delay |
C. | latency |
D. | both seek time and rotational delay |
Answer» D. both seek time and rotational delay | |
Explanation: the seek time refers to the time required to move the head to the required disk. |
619. |
The disk drive is connected to the system by using the |
A. | pci bus |
B. | scsi bus |
C. | hdmi |
D. | isa |
Answer» B. scsi bus | |
Explanation: none. |
620. |
is used to deal with the difference in the transfer rates between the drive and the bus. |
A. | data repeaters |
B. | enhancers |
C. | data buffers |
D. | none of the mentioned |
Answer» C. data buffers | |
Explanation: the buffers are added to store the data from the fast device and to send it to the slower device at its rate. |
621. |
is used to detect and correct the errors that may occur during data transfers. |
A. | ecc |
B. | crc |
C. | checksum |
D. | none of the mentioned |
Answer» A. ecc | |
Explanation: ecc stands for error correcting code. |
622. |
______ has been developed specifically for pipelined systems. |
A. | Utility software |
B. | Speed up utilities |
C. | Optimizing compilers |
D. | None of the mentioned |
Answer» C. Optimizing compilers |
623. |
The fetch and execution cycles are interleaved with the help of ________ |
A. | Modification in processor architecture |
B. | Clock |
C. | Special unit |
D. | Control unit |
Answer» B. Clock |
624. |
Each stage in pipelining should be completed within ____ cycle. |
A. | 1 |
B. | 2 |
C. | 3 |
D. | 4 |
Answer» A. 1 |
625. |
To increase the speed of memory access in pipelining, we make use of _______ |
A. | Special memory locations |
B. | Special purpose registers |
C. | Cache |
D. | Buffers |
Answer» C. Cache |
626. |
The situation wherein the data of operands are not available is called ______ |
A. | Data hazard |
B. | Stock |
C. | Deadlock |
D. | Structural hazard |
Answer» A. Data hazard |
627. |
The time lost due to the branch instruction is often referred to as _____ |
A. | Latency |
B. | Delay |
C. | Branch penalty |
D. | None of the mentioned |
Answer» C. Branch penalty |
628. |
The algorithm followed in most of the systems to perform out of order execution is ______ |
A. | Tomasulo algorithm |
B. | Score carding |
C. | Reader-writer algorithm |
D. | None of the mentioned |
Answer» A. Tomasulo algorithm |
629. |
The logic operations are implemented using _______ circuits. |
A. | Bridge |
B. | Logical |
C. | Combinatorial |
D. | Gate |
Answer» C. Combinatorial |
630. |
The carry generation function: ci + 1 = yici + xici + xiyi, is implemented in ____________ |
A. | Half adders |
B. | Full adders |
C. | Ripple adders |
D. | Fast adders |
Answer» B. Full adders |
631. |
Which option is true regarding the carry in the ripple adders? |
A. | Are generated at the beginning only |
B. | Must travel through the configuration |
C. | Is generated at the end of each operation |
D. | None of the mentioned |
Answer» B. Must travel through the configuration |
632. |
In full adders the sum circuit is implemented using ________ |
A. | And & or gates |
B. | NAND gate |
C. | XOR |
D. | XNOR |
Answer» C. XOR |
633. |
The usual implementation of the carry circuit involves _________ |
A. | And & or gates |
B. | XOR |
C. | NAND |
D. | XNOR |
Answer» B. XOR |
634. |
The advantage of I/O mapped devices to memory mapped is ___________ |
A. | The former offers faster transfer of data |
B. | The devices connected using I/O mapping have a bigger buffer space |
C. | The devices have to deal with fewer address lines |
D. | No advantage as such |
Answer» C. The devices have to deal with fewer address lines |
635. |
The system is notified of a read or write operation by ___________ |
A. | Appending an extra bit of the address |
B. | Enabling the read or write bits of the devices |
C. | Raising an appropriate interrupt signal |
D. | Sending a special signal along the BUS |
Answer» D. Sending a special signal along the BUS |
636. |
To overcome the lag in the operating speeds of the I/O device and the processor we use ___________ |
A. | Buffer spaces |
B. | Status flags |
C. | Interrupt signals |
D. | Exceptions |
Answer» B. Status flags |
637. |
The method which offers higher speeds of I/O transfers is ___________ |
A. | Interrupts |
B. | Memory mapping |
C. | Program-controlled I/O |
D. | DMA |
Answer» D. DMA |
638. |
The instruction, Add #45, R1 does _______ |
A. | Adds the value of 45 to the address of R1 and stores 45 in that address |
B. | Adds 45 to the value of R1 and stores it in R1 |
C. | Finds the memory location 45 and adds that content to that of R1 |
D. | None of the mentioned |
Answer» B. Adds 45 to the value of R1 and stores it in R1 |
639. |
In the case of, Zero-address instruction method the operands are stored in _____ |
A. | Registers |
B. | Accumulators |
C. | Push down stack |
D. | Cache |
Answer» C. Push down stack |
640. |
The addressing mode which makes use of in-direction pointers is ______ |
A. | Indirect addressing mode |
B. | Index addressing mode |
C. | Relative addressing mode |
D. | Offset addressing mode |
Answer» A. Indirect addressing mode |
641. |
The addressing mode/s, which uses the PC instead of a general purpose register is ______ |
A. | Indexed with offset |
B. | Relative |
C. | direct |
D. | both Indexed with offset and direct |
Answer» B. Relative |
642. |
_____ addressing mode is most suitable to change the normal sequence of execution of instructions. |
A. | Relative |
B. | Indirect |
C. | Index with Offset |
D. | Immediate |
Answer» A. Relative |
643. |
The reason for the implementation of the cache memory is ________ |
A. | To increase the internal memory of the system |
B. | The difference in speeds of operation of the processor and memory |
C. | To reduce the memory access and cycle time |
D. | All of the mentioned |
Answer» B. The difference in speeds of operation of the processor and memory |
644. |
The effectiveness of the cache memory is based on the property of ________ |
A. | Locality of reference |
B. | Memory localisation |
C. | Memory size |
D. | None of the mentioned |
Answer» A. Locality of reference |
645. |
The spatial aspect of the locality of reference means ________ |
A. | That the recently executed instruction is executed again next |
B. | That the recently executed won’t be executed again |
C. | That the instruction executed will be executed at a later time |
D. | That the instruction in close proximity of the instruction executed will be executed in future |
Answer» D. That the instruction in close proximity of the instruction executed will be executed in future |
646. |
The correspondence between the main memory blocks and those in the cache is given by _________ |
A. | Hash function |
B. | Mapping function |
C. | Locale function |
D. | Assign function |
Answer» B. Mapping function |
647. |
The copy-back protocol is used ________ |
A. | To copy the contents of the memory onto the cache |
B. | To update the contents of the memory from the cache |
C. | To remove the contents of the cache and push it on to the memory |
D. | None of the mentioned |
Answer» B. To update the contents of the memory from the cache |
648. |
The address space is 22 bits the memory is 32 bit word addressable what is the memory size |
A. | 16MB |
B. | 512KB |
C. | 4MB |
D. | 1GB |
Answer» A. 16MB |
649. |
In which cycle the memory is read and the contents of memory at the address containedin the PC register are loaded into in to IR. |
A. | Execution Cycle |
B. | Memory Cycle |
C. | Fetch Cycle |
D. | Decode Cycle |
Answer» C. Fetch Cycle |
650. |
The part of machine level instruction, which tells the central processor what has to be done, is |
A. | Operation code |
B. | Address |
C. | Locator |
D. | Flip-Flop |
Answer» A. Operation code |
651. |
A system program that combines the separately compiled modules of a program into a form suitable for execution |
A. | assembler |
B. | linking loader |
C. | cross compiler |
D. | load and go |
Answer» B. linking loader |
652. |
Which parameter of computer determines its power to do various operations on data items |
A. | Instruction set |
B. | Memory size |
C. | Assembly language |
D. | Application language |
Answer» A. Instruction set |
653. |
The multiplier is stored in |
A. | PC Register |
B. | Shift Register |
C. | Cache |
D. | None of the above |
Answer» B. Shift Register |
654. |
Which methods of representation of numbers occupies large amount of memory than others? |
A. | sign-magnitude |
B. | 1’s compliment |
C. | 2’s compliment |
D. | Both a and b |
Answer» A. sign-magnitude |
655. |
The register used to store the flags is called as |
A. | Flag register |
B. | Status register |
C. | Test register |
D. | log register |
Answer» B. Status register |
656. |
__________is used to implement virtual memory organization. |
A. | Page table |
B. | Frame table |
C. | MMU |
D. | None of the mentioned |
Answer» C. MMU |
657. |
_________ method is used to establish priority by serially connecting all devices that request an interrupt. |
A. | Vectored-interrupting |
B. | Daisy chain |
C. | Priority |
D. | Polling |
Answer» B. Daisy chain |
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