650+ Operating System (OS) Solved MCQs

These multiple-choice questions (MCQs) are designed to enhance your knowledge and understanding in the following areas: Computer Science Engineering (CSE) , Information Technology Engineering (IT) , Bachelor of Science in Computer Science FY (BSc CS) , Bachelor of Computer Applications (BCA) , Bachelor of Science in Computer Science (BSc CS) .

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101.	Control Unit acts as the central nervous system of the computer.
A.	true
B.	false
Answer» A. true

102.	What does MBR stand for?
A.	main buffer register
B.	memory buffer routine
C.	main buffer routine
D.	memory buffer register
Answer» D. memory buffer register

103.	In the instruction ADD A, B, the answer gets stored in
A.	b
B.	a
C.	buffer
D.	c
Answer» B. a

104.	What does PC stand for?
A.	program changer
B.	program counter
C.	performance counter
D.	performance changer
Answer» B. program counter

105.	Which of the following holds the last instruction fetched?
A.	pc
B.	mar
C.	mbr
D.	ir
Answer» D. ir

106.	The portion of the processor which contains the hardware required to fetch the operations is
A.	datapath
B.	processor
C.	control
D.	output unit
Answer» A. datapath

107.	Causing the CPU to step through a series of micro operations is called
A.	execution
B.	runtime
C.	sequencing
D.	pipelining
Answer» C. sequencing

108.	The functions of execution and sequencing are performed by using
A.	input signals
B.	output signals
C.	control signals
D.	cpu
Answer» C. control signals

109.	What does D in the D-flip flop stand for?
A.	digital
B.	direct
C.	delay
D.	durable
Answer» C. delay

110.	What is the high speed memory between the main memory and the CPU called?
A.	register memory
B.	cache memory
C.	storage memory
D.	virtual memory
Answer» B. cache memory

111.	Cache Memory is implemented using the DRAM chips.
A.	true
B.	false
Answer» B. false

112.	Whenever the data is found in the cache memory it is called as
A.	hit
B.	miss
C.	found
D.	error
Answer» A. hit

113.	LRU stands for
A.	low rate usage
B.	least rate usage
C.	least recently used
D.	low required usage
Answer» C. least recently used

114.	When the data at a location in cache is different from the data located in the main memory, the cache is called
A.	unique
B.	inconsistent
C.	variable
D.	fault
Answer» B. inconsistent

115.	Which of the following is not a write policy to avoid Cache Coherence?
A.	write through
B.	write within
C.	write back
D.	buffered write
Answer» B. write within

116.	Which of the following is an efficient method of cache updating?
A.	snoopy writes
B.	write through
C.	write within
D.	buffered write
Answer» A. snoopy writes

117.	In mapping, the data can be mapped anywhere in the Cache Memory.
A.	associative
B.	direct
C.	set associative
D.	indirect
Answer» A. associative

118.	The number of sign bits in a 32-bit IEEE format is
A.	1
B.	11
C.	9
D.	23
Answer» A. 1

119.	The transfer between CPU and Cache is
A.	block transfer
B.	word transfer
C.	set transfer
D.	associative transfer
Answer» B. word transfer

120.	Computer has a built-in system clock that emits millions of regularly spaced electric pulses per called clock cycles.
A.	second
B.	millisecond
C.	microsecond
D.	minute
Answer» A. second

121.	It takes one clock cycle to perform a basic operation.
A.	true
B.	false
Answer» A. true

122.	The operation that does not involves clock cycles is
A.	installation of a device
B.	execute
C.	fetch
D.	decode
Answer» A. installation of a device

123.	The number of clock cycles per second is referred as
A.	clock speed
B.	clock frequency
C.	clock rate
D.	clock timing
Answer» A. clock speed

124.	CISC stands for
A.	complex information sensed cpu
B.	complex instruction set computer
C.	complex intelligence sensed cpu
D.	complex instruction set cpu
Answer» B. complex instruction set computer

125.	Which of the following processor has a fixed length of instructions?
A.	cisc
B.	risc
C.	epic
D.	multi-core
Answer» B. risc

650+ Operating System (OS) Solved MCQs

Control Unit acts as the central nervous system of the computer.

What does MBR stand for?

In the instruction ADD A, B, the answer gets stored in

What does PC stand for?

Which of the following holds the last instruction fetched?

The portion of the processor which contains the hardware required to fetch the operations is

Causing the CPU to step through a series of micro operations is called

The functions of execution and sequencing are performed by using

What does D in the D-flip flop stand for?

What is the high speed memory between the main memory and the CPU called?

Cache Memory is implemented using the DRAM chips.

Whenever the data is found in the cache memory it is called as

LRU stands for

When the data at a location in cache is different from the data located in the main memory, the cache is called

Which of the following is not a write policy to avoid Cache Coherence?

Which of the following is an efficient method of cache updating?

In mapping, the data can be mapped anywhere in the Cache Memory.

The number of sign bits in a 32-bit IEEE format is

The transfer between CPU and Cache is

Computer has a built-in system clock that emits millions of regularly spaced electric pulses per called clock cycles.

It takes one clock cycle to perform a basic operation.

The operation that does not involves clock cycles is

The number of clock cycles per second is referred as

CISC stands for

Which of the following processor has a fixed length of instructions?

Processor which is complex and expensive to produce is

The architecture that uses a tighter coupling between the compiler and the processor is

MAR stands for

A circuitry that processes that responds to and processes the basic instructions that are required to drive a computer system is

Any electronic holding place where data can be stored and retrieved later whenever required is

Cache memory is the onboard storage.

Which of the following is the fastest means of memory access for CPU?

The memory implemented using the semiconductor chips is

Size of the memory mainly depends on the size of the address bus.

Which of the following is independent of the address bus?

storage is a system where a robotic arm will connect or disconnect off- line mass storage media according to the computer operating system demands.

What is the location of the internal registers of CPU?

If M denotes the number of memory locations and N denotes the word size, then an expression that denotes the storage capacity is

The operation that does not involves clock cycles is

The number of clock cycles per second is referred as

CISC stands for

Processor which is complex and expensive to produce

The architecture that uses a tighter coupling between the compiler and the processor.

HLDA stands for

Word length of a personal computer

Winchester disks are a type of

Bernoulli disks are a type of magnetic floppy disks.

A plug and play storage device that simply plugs in the port of a computer is

What does USB stand for?

A device similar to a flash drive

126.	Processor which is complex and expensive to produce is
A.	risc
B.	epic
C.	cisc
D.	multi-core
Answer» C. cisc

127.	The architecture that uses a tighter coupling between the compiler and the processor is
A.	epic
B.	multi-core
C.	risc
D.	cisc
Answer» A. epic

128.	MAR stands for
A.	memory address register
B.	main address register
C.	main accessible register
D.	memory accessible register
Answer» A. memory address register

129.	A circuitry that processes that responds to and processes the basic instructions that are required to drive a computer system is
A.	memory
B.	alu
C.	cu
D.	processor
Answer» D. processor

130.	Any electronic holding place where data can be stored and retrieved later whenever required is
A.	memory
B.	drive
C.	disk
D.	circuit
Answer» A. memory

131.	Cache memory is the onboard storage.
A.	true
B.	false
Answer» A. true

132.	Which of the following is the fastest means of memory access for CPU?
A.	registers
B.	cache
C.	main memory
D.	virtual memory
Answer» A. registers

133.	The memory implemented using the semiconductor chips is
A.	cache
B.	main
C.	secondary
D.	registers
Answer» B. main

134.	Size of the memory mainly depends on the size of the address bus.
A.	main
B.	virtual
C.	secondary
D.	cache
Answer» A. main

135.	Which of the following is independent of the address bus?
A.	secondary memory
B.	main memory
C.	onboard memory
D.	cache memory
Answer» A. secondary memory