McqMate
These multiple-choice questions (MCQs) are designed to enhance your knowledge and understanding in the following areas: Uncategorized topics .
| 51. |
The time interval between adjacent bits is called the |
| A. | word-time |
| B. | bit-time |
| C. | turn around time |
| D. | slice time |
| Answer» B. bit-time | |
| 52. |
A group of bits that tell the computer to perform a specific operation is known as |
| A. | instruction code |
| B. | micro-operation |
| C. | accumulator |
| D. | register |
| Answer» A. instruction code | |
| 53. |
The load instruction is mostly used to designate a transfer from memory to a processor register known as |
| A. | accumulator |
| B. | instruction register |
| C. | program counter |
| D. | memory address register |
| Answer» A. accumulator | |
| 54. |
The communication between the components in a microcomputer takes place via the address and |
| A. | i/o bus |
| B. | data bus |
| C. | address bus |
| D. | control lines |
| Answer» B. data bus | |
| 55. |
An instruction pipeline can be implemented by means of |
| A. | lifo buffer |
| B. | fifo buffer |
| C. | stack |
| D. | none of the above |
| Answer» B. fifo buffer | |
| 56. |
Data input command is just the opposite of a |
| A. | test command |
| B. | control command |
| C. | data output |
| D. | data channel |
| Answer» C. data output | |
| 57. |
A microprogram sequencer |
| A. | generates the address of next micro instruction to be executed. |
| B. | generates the control signals to execute a microinstruction. |
| C. | sequentially averages all microinstructions in the control memory. |
| D. | enables the efficient handling of a micro program subroutine. |
| Answer» A. generates the address of next micro instruction to be executed. | |
| 58. |
. A binary digit is called a |
| A. | bit |
| B. | byte |
| C. | number |
| D. | character |
| Answer» A. bit | |
| 59. |
A flip-flop is a binary cell capable of storing information of |
| A. | one bit |
| B. | byte |
| C. | zero bit |
| D. | eight bit |
| Answer» A. one bit | |
| 60. |
The operation executed on data stored in registers is called |
| A. | macro-operation |
| B. | micro-operation |
| C. | bit-operation |
| D. | byte-operation |
| Answer» B. micro-operation | |
| 61. |
MRI indicates |
| A. | memory reference information. |
| B. | memory reference instruction. |
| C. | memory registers instruction. |
| D. | memory register information |
| Answer» B. memory reference instruction. | |
| 62. |
Self-contained sequence of instructions that performs a given computational task is called |
| A. | function |
| B. | procedure |
| C. | subroutine |
| D. | routine |
| Answer» A. function | |
| 63. |
Microinstructions are stored in control memory groups, with each group specifying a |
| A. | routine |
| B. | subroutine |
| C. | vector |
| D. | address |
| Answer» A. routine | |
| 64. |
An interface that provides a method for transferring binary information between internal storage and external devices is called |
| A. | i/o interface |
| B. | input interface |
| C. | output interface |
| D. | i/o bus |
| Answer» A. i/o interface | |
| 65. |
Status bit is also called |
| A. | binary bit |
| B. | flag bit |
| C. | signed bit |
| D. | unsigned bit |
| Answer» B. flag bit | |
| 66. |
An address in main memory is called |
| A. | physical address |
| B. | logical address |
| C. | memory address |
| D. | word address |
| Answer» A. physical address | |
| 67. |
If the value V(x) of the target operand is contained in the address field itself, the addressing mode is |
| A. | immediate. |
| B. | direct. |
| C. | indirect. |
| D. | implied. |
| Answer» B. direct. | |
| 68. |
can be represented in a signed magnitude format and in a 1’s complement format as |
| A. | 111011 & 100100 |
| B. | 100100 & 111011 |
| C. | 011011 & 100100 |
| D. | 100100 & 011011 |
| Answer» A. 111011 & 100100 | |
| 69. |
in the external main memory are called |
| A. | data transfer instructions. |
| B. | program control instructions. |
| C. | input-output instructions. |
| D. | logical instructions. |
| Answer» A. data transfer instructions. | |
| 70. |
A device/circuit that goes through a predefined sequence of states upon the application of input pulses is called |
| A. | register |
| B. | flip-flop |
| C. | transistor. |
| D. | counter. |
| Answer» D. counter. | |
| 71. |
The performance of cache memory is frequently measured in terms of a quantity called |
| A. | miss ratio. |
| B. | hit ratio. |
| C. | latency ratio. |
| D. | read ratio. |
| Answer» C. latency ratio. | |
| 72. |
The information available in a state table may be represented graphically in a |
| A. | simple diagram. |
| B. | state diagram. |
| C. | complex diagram. |
| D. | data flow diagram. |
| Answer» B. state diagram. | |
| 73. |
Content of the program counter is added to the address part of the instruction in order to obtain the effective address is called. |
| A. | relative address mode. |
| B. | index addressing mode. |
| C. | register mode. |
| D. | implied mode. |
| Answer» A. relative address mode. | |
| 74. |
An interface that provides I/O transfer of data directly to and form the memory unit and peripheral is termed as |
| A. | dda. |
| B. | serial interface. |
| C. | br. |
| D. | dma. |
| Answer» D. dma. | |
| 75. |
The 2s compliment form (Use 6 bit word) of the number 1010 is |
| A. | 111100. |
| B. | 110110. |
| C. | 110111. |
| D. | 1011. |
| Answer» B. 110110. | |
| 76. |
A register capable of shifting its binary information either to the right or the left is called a |
| A. | parallel register. |
| B. | serial register. |
| C. | shift register. |
| D. | storage register. |
| Answer» C. shift register. | |
| 77. |
What is the content of Stack Pointer (SP)? |
| A. | address of the current instruction |
| B. | address of the next instruction |
| C. | address of the top element of the stack |
| D. | size of the stack. |
| Answer» C. address of the top element of the stack | |
| 78. |
Which of the following interrupt is non maskable |
| A. | intr. |
| B. | rst 7.5. |
| C. | rst 6.5. |
| D. | trap. |
| Answer» D. trap. | |
| 79. |
Which of the following is a main memory |
| A. | secondary memory. |
| B. | auxiliary memory. |
| C. | cache memory. |
| D. | virtual memory. |
| Answer» C. cache memory. | |
| 80. |
Which of the following are not a machine instructions |
| A. | mov. |
| B. | org. |
| C. | end. |
| D. | (b) & (c) . |
| Answer» D. (b) & (c) . | |
| 81. |
In Assembly language programming, minimum number of operands required for an instruction is/are |
| A. | zero. |
| B. | one. |
| C. | two. |
| D. | both (b) & (c) . |
| Answer» A. zero. | |
| 82. |
The maximum addressing capacity of a micro processor which uses 16 bit database & 32 bit address base is |
| A. | 64 k. |
| B. | 4 gb. |
| C. | both (a) & (b) . |
| D. | none of these. |
| Answer» B. 4 gb. | |
| 83. |
The memory unit that communicates directly with the CPU is called the |
| A. | main memory |
| B. | secondary memory |
| C. | shared memory |
| D. | auxiliary memory. |
| Answer» A. main memory | |
| 84. |
The average time required to reach a storage location in memory and obtain its contents is called |
| A. | latency time. |
| B. | access time. |
| C. | turnaround time. |
| D. | response time. |
| Answer» B. access time. | |
| 85. |
A successive A/D converter is |
| A. | a high-speed converter. |
| B. | a low speed converter. |
| C. | a medium speed converter. |
| D. | none of these. |
| Answer» C. a medium speed converter. | |
| 86. |
When necessary, the results are transferred from the CPU to main memory by |
| A. | i/o devices. |
| B. | cpu. |
| C. | shift registers. |
| D. | none of these. |
| Answer» C. shift registers. | |
| 87. |
A combinational logic circuit which sends data coming from a single source to two or more separate destinations is |
| A. | decoder. |
| B. | encoder. |
| C. | multiplexer. |
| D. | demultiplexer. |
| Answer» D. demultiplexer. | |
| 88. |
In which addressing mode the operand is given explicitly in the instruction |
| A. | absolute. |
| B. | immediate . |
| C. | indirect. |
| D. | direct. |
| Answer» B. immediate . | |
| 89. |
A stack organized computer has |
| A. | three-address instruction. |
| B. | two-address instruction. |
| C. | one-address instruction. |
| D. | zero-address instruction. |
| Answer» D. zero-address instruction. | |
| 90. |
The effective address in the relative address mode, when an instruction is read from the memory is |
| A. | 849. |
| B. | 850. |
| C. | 801. |
| D. | 802. |
| Answer» B. 850. | |
| 91. |
A page fault |
| A. | occurs when there is an error in a specific page. |
| B. | occurs when a program accesses a page of main memory. |
| C. | occurs when a program accesses a page not currently in main memory. |
| D. | occurs when a program accesses a page belonging to another program. |
| Answer» C. occurs when a program accesses a page not currently in main memory. | |
| 92. |
The load instruction is mostly used to designate a transfer from memory to a processor register known as____. |
| A. | . accumulator |
| B. | . instruction register |
| C. | . program counter |
| D. | . memory address register |
| Answer» A. . accumulator | |
| 93. |
A group of bits that tell the computer to perform a specific operation is known as____. |
| A. | . instruction code |
| B. | . micro-operation |
| C. | . accumulator |
| D. | . register |
| Answer» A. . instruction code | |
| 94. |
The time interval between adjacent bits is called the_____. |
| A. | . word-time |
| B. | . bit-time |
| C. | . turn around time |
| D. | . slice time |
| Answer» B. . bit-time | |
| 95. |
A k-bit field can specify any one of_____. |
| A. | . 3k registers |
| B. | . 2k registers |
| C. | . k2 registers |
| D. | . k3 registers |
| Answer» B. . 2k registers | |
| 96. |
MIMD stands for _____. |
| A. | . multiple instruction multiple data |
| B. | . multiple instruction memory data |
| C. | . memory instruction multiple data |
| D. | . multiple information memory data |
| Answer» A. . multiple instruction multiple data | |
| 97. |
Logic gates with a set of input and outputs is arrangement of______. |
| A. | . computational circuit |
| B. | . logic circuit |
| C. | . design circuits |
| D. | . register |
| Answer» A. . computational circuit | |
| 98. |
The average time required to reach a storage location in memory and obtain its contents is called_____. |
| A. | . latency time. |
| B. | . access time. |
| C. | . turnaround time. |
| D. | . response time. |
| Answer» B. . access time. | |
| 99. |
The BSA instruction is______. |
| A. | . branch and store accumulator |
| B. | . branch and save return address |
| C. | . branch and shift address |
| D. | . branch and show accumulator |
| Answer» B. . branch and save return address | |
| 100. |
A floating point number that has a O in the MSB of mantissa is said to have_____. |
| A. | . overflow |
| B. | . underflow |
| C. | . important number |
| D. | . undefined |
| Answer» B. . underflow | |
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